Alphawave’s First UCIe IP Subsystem Based on TSMC 2nm Successfully Taped Out
On June 5, semiconductor IP company Alphawave Semi announced that its UCIe IP subsystem has successfully taped out, utilizing TSMC’s 2nm (N2) process, supporting a 36G Die-to-Die data rate. This IP is fully integrated with TSMC’s Chip-on-Wafer-on-Substrate (CoWoS) advanced packaging technology, unlocking breakthrough bandwidth density and scalability for next-generation chiplet architectures. This milestone builds on … Read more