CSI-2 defines the communication data packet format between the host and peripherals for cameras. MIPI Rx supports pixel data parsing in RAW10/RAW12/RAW14 formats.
There are two types of CSI-2 data packets: long frames and short frames. Regardless of whether it is a long frame or a short frame, the beginning of the frame is ST, and the end of the frame is ET. Additionally, after the ST of a long frame, there is a Packet Header (PH), and before the ET, there is a Packet Footer (PF). Between two HS transmission processes, the LP state is inserted, generally LP11 or other Control states, and of course, it can also enter Escape state for LPDT or UPLS.
LPS: Low Power State, the spacing distance between packets. ST: Start of Transmission (SoT), the start signal of the packet, generally a transient signal transitioning from low speed to high speed. ET: End of Transmission (EoT), the end signal of the packet, generally a transient signal transitioning from high speed to low speed. PH: Packet Header, represented by 32 bits, the header of the packet. PF: Packet Footer, represented by 16 bits, the end of the packet.
Long Frame Structure
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Data Identifier (DI): 1 byte. Includes VC and DT, the specific structure will be introduced later.
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Data Count (WC): 2 bytes. The length of the padding data between the end of PH and the start of PF, measured in bytes. The receiving end uses WC to determine the end position of the packet.
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Error Detection (ECC): 1 byte. Uses Hamming Code to correct one bit error in PH or detect two bit errors.
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Data Padding (0~65535 bytes): Length = WC*8 bits. There are no restrictions on the data content.
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Checksum (CS): 2 bytes. CHECKSUM uses CCITT’s 16-bit CRC check, i.e., x16+x12+x5+x0. CRC can only detect one or more errors but cannot correct them.
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DI, WC, and ECC together form PH, while Checksum forms PF separately.
Please log into the server to check what the bit width of WC is in the design of Jingxin SoC? Please debug:
Classic design in digital circuits: implementation of multiple communication data Lane Merging design
Classic design in digital circuits: implementation of multiple communication data Lane Distribution
【Jingxin SoC Training Camp Mission】: Enable everyone to independently design their own MCU chip!
【The only one on the internet】Jingxin SoC is a low-power ISP image processing SoC used for chip full-process training, adopting a low-power RISC-V processor, built-in ITCM SRAM, DTCM SRAM, integrating IPs including MIPI, ISP, CNN, QSPI, UART, I2C, GPIO, and 100Mbps Ethernet, designed using SMIC40 process technology.
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Data path for image processing
CRG design of Jingxin SoC
One-click completion of C code compilation, simulation, synthesis, DFT insertion, formal verification, layout and routing, parasitic parameter extraction, PT analysis, DRC/LVS, post-simulation, formal verification, power analysis, and other full processes. The upgraded chip design engineering V2.0 flow is as follows:
SoC one-click execution flow
MIPI DPHY+CSI2 Decoding
Classic design in digital circuits: implementation of multiple communication data Lane Merging design
Classic design in digital circuits: implementation of multiple communication data Lane Distribution
UPF Low Power Design
Full-chip UPF low power design (including DFT design)
Chip layout design V1.0
Chip layout design V2.0
The DRC/LVS of low power design, the LVS of the chip top layer is very challenging! Unique experience sharing in the industry.
ISP Image Processing
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dpc – Bad pixel correction
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blc – Black level correction
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bnr – Bayer noise reduction
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dgain – Digital gain
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demosaic – Demosaicing
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wb – White balance gain
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ccm – Color correction matrix
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csc – Color space conversion (RGB2YUV conversion formula based on integer optimization)
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gamma – Gamma correction (brightness based on lookup table Gamma correction)
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ee – Edge enhancement
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stat_ae – Automatic exposure statistics
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stat_awb – Automatic white balance statistics
CNN Image Recognition
Supports handwritten digit AI recognition:
Simulation results: simulation recognition of images 7, 2, 1, 0, 4, 1, 4, 9
CPU Boot Instruction Analysis
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