Scheduling Mechanism of the Linux Kernel

Scheduling Mechanism of the Linux Kernel

The Linux kernel’s scheduling mechanism supports various scheduling policies, categorized by priority from high to low: Deadline Scheduling (SCHED_DEADLINE): the highest priority, based on deadline scheduling, suitable for tasks with strict timing requirements. Real-time Scheduling includes SCHED_FIFO and SCHED_RR. SCHED_FIFO: first-in, first-out, with no time slice limit, until voluntarily relinquished or preempted by a higher-priority … Read more

Memory Management in Embedded Real-Time Systems: Advice from SafeRTOS Experts

Memory Management in Embedded Real-Time Systems: Advice from SafeRTOS Experts

In real-time systems, memory is not just about efficiency, but also about predictability and reliability. Poor memory management can lead to missed deadlines, instability, and even become a barrier to safety certification. Here are some proven best practices: • Prefer static allocation → predictable and controllable. • Correctly size tasks and system stacks → cover … Read more

The Real Performance of ARMxy on IGH EtherCAT Master: Stable and Incredibly Fast

The Real Performance of ARMxy on IGH EtherCAT Master: Stable and Incredibly Fast

1. What is EtherCAT? A Clever Analogy First, forget the traditional network concept. You can imagine it like this:Traditional Ethernet (like TCP/IP): It’s like a postman delivering letters to every household in an apartment building. The postman has to walk to each door (node), knock, wait, and hand over the letter (data) to the resident. … Read more

Optimized Embedded Double Buffering Design: Say Goodbye to Data Races and Reduce Memory Copies

Optimized Embedded Double Buffering Design: Say Goodbye to Data Races and Reduce Memory Copies

In embedded development, have you ever encountered the following issues: The speed mismatch between data producers (e.g., sensor acquisition) and consumers (e.g., data processing threads) Using a single buffer leads to read-write conflicts that cause data corruption Frequent memory copies result in low CPU efficiency Data loss issues are difficult to resolve completely Today, I … Read more

ARMv8-R AArch32 Architecture Features and Cortex-R52+ Positioning

ARMv8-R AArch32 Architecture Features and Cortex-R52+ Positioning

Chapter 1 Overview of Cortex-R52+ and Domestic Chip Ecosystem 1.1 ARMv8-R AArch32 Architecture Features and Cortex-R52+ Positioning 1.1.1 Core Features of ARMv8-R Architecture 1.1.1.1 Design Philosophy of Real-Time Processors The ARMv8-R architecture is a processor architecture specifically designed by ARM for real-time embedded systems. Unlike the ARMv8-A architecture aimed at general-purpose computing, the core design … Read more

Building a High-Performance Iterable Circular Buffer with Modern C++ (Complete Code Included)

In embedded systems, network programming, or real-time data stream processing, we often need a fixed-capacity queue structure that supports overwrite. A typical representative of this structure is the Circular Buffer. This article will guide you through implementing a modern C++ style circular buffer from scratch, supporting: ✅ Compile-time fixed capacity✅ Automatic overwrite of the oldest … Read more

Introduction to the Cortex Series Processors

“The ARM Cortex series is at the core of embedded processors, categorized into three main types: A, R, and M. The A series focuses on high performance, suitable for complex systems; the R series excels in real-time reliability, serving safety-critical scenarios; and the M series emphasizes low power consumption, empowering IoT devices. .“ 01 — … Read more

System Architecture Designer – Chapter 16 Embedded System Architecture Design Theory and Practice

System Architecture Designer - Chapter 16 Embedded System Architecture Design Theory and Practice

This chapter has many key points, with application technology accounting for approximately 25 points. 16.1 Overview of Embedded Systems Embedded systems are computer systems specifically built for particular applications. 16.1.1 Development History of Embedded Systems First Stage: Single-Chip Microcomputer (SCM) stage, which is the era of microcontrollers. The hardware is the microcontroller, and the software … Read more

Comparative Analysis of Hard PLC and Soft PLC

Comparative Analysis of Hard PLC and Soft PLC

Click 【Industrial Automation Insights】 to follow us! This article delves into the analysis and discussion of two key PLC technologies in current industrial automation: traditional hard PLCs and software-based soft PLCs. Source: Xiaoyu Discovery Basic Concepts and Essential Differences between Hard and Soft PLCs Comparison of Operating Principles Feature Hard PLC Soft PLC Processing Core … Read more

Common Software Architectures for Microcontroller Development

Common Software Architectures for Microcontroller Development

Microcontroller programs are familiar to everyone, but few truly consider the architecture used. As program development continues to increase, having a solid architecture becomes essential. 1. Time-Slice Polling Method This is a program architecture design scheme that lies between sequential execution methods and operating systems. This design scheme aims to help embedded software developers elevate … Read more