Hello everyone, I am Pi Zi Heng, a serious tech enthusiast. Today, I will introduce you to Super Download Algorithm Development Notes (1) Execution on Different CM Cores. This article continues from the previous one titled RT-UFL – A Super Download Algorithm Design Suitable for All i.MXRT Platforms, and the open-source project initiated by Pi … Read more
[Image] We can optimize the neural network architecture to fit within the memory and computational constraints of microcontrollers without compromising accuracy. In this article, we will explain and explore the potential of depthwise separable convolutional neural networks for implementing keyword recognition on Cortex-M processors. Keyword recognition (KWS) is crucial for enabling voice-based user interaction on … Read more
Hello everyone, I am Pi Zi Heng, a serious tech enthusiast. Today, I will introduce you to ARM Cortex-M Functional Modules. The ARM Cortex-M processor family has developed to date (2016) with five generations of products, namely CM0/CM0+, CM1, CM3, CM4, and CM7. 1. Cortex-M Compatibility Features To achieve software reuse in Cortex-M, ARM has … Read more
Hello everyone, I am Pi Zi Heng, a genuine tech enthusiast. Today, I will introduce the ARM Cortex-M functional modules, focusing on three processors with security features. The ARM Cortex-M processor family has evolved over 8 generations by 2020. In addition to the previously discussed CM0/CM0+, CM1, CM3, CM4, and CM7 in the article “Differences … Read more
Follow+Star Public Account, don’t miss exciting content Author | strongerHuang WeChat Public Account | Embedded Column Everyone often hears terms like MCU, MPU, MMU, but do you understand MPU? In the embedded field, MPU usually has two different meanings: 1. Microprocessor Unit; 2.Memory Protection Unit. In this article, the MPU of the Cortex-M core refers … Read more
Today, Pi Zi Heng will share with you the three implementations of critical section protection in Cortex-M bare metal. Those who have worked with embedded systems and RTOS are likely familiar with the function codes OS_ENTER_CRITICAL() and OS_EXIT_CRITICAL(). In RTOS, multi-tasking (process) handling often occurs, and in some situations, certain special operations (such as Flash … Read more
Ozone helps users quickly analyze and locate software bugs that cause CPU failures. This article explains how to use Ozone’s debugging features to gain insights into these errors on the Cortex-M architecture. Fault Analysis Process We will first demonstrate Ozone’s fault analysis workflow based on a sample application. The sample application can generate different types … Read more
Follow/Star Public Account, don’t miss any updates! I believe everyone often sees abbreviations like MCU, MPU, MMU, etc. Do you know about the MPU? 1Introduction Not sure if everyone has paid attention to some aspects of the Cortex-M core, but most STM32 models have an MPU. The MPU is an optional component of Cortex-M. For … Read more
Source | Pi Zi Heng Embedded Today, I will share with you three implementations of critical section protection in Cortex-M bare metal environments. Friends who have worked with embedded systems and RTOS are probably very familiar with the functionality codes OS_ENTER_CRITICAL() and OS_EXIT_CRITICAL(). In an RTOS, there are often multi-task (process) handling situations where certain … Read more
Regarding these knowledge points, if everyone goes to learn from the authoritative guide of the Cortex-M kernel, especially for beginners, it will take a long time to digest. Therefore, to help everyone better understand the OS features of the Cortex-M kernel, this video has been specially produced. Everyone can conveniently grasp the essence of these … Read more