Resource Management Problem: When a task is using a resource and is preempted before it has finished using it, the resource may be left in an incomplete or corrupted state. If another task or interrupt tries to access this resource at that time, it can lead to data corruption or processing errors. That is why … Read more
“ In the ESP32 multi-tasking system based on FreeRTOS, sharing resources among multiple tasks or interrupts can easily lead to race conditions. To address this issue, critical sections are essential. The following will elaborate on their function and principles, detail the relevant APIs in the IDF version, and provide code examples in scenarios such as … Read more
1. Interrupt Priority <span>Cortex-M</span> series cores (such as <span>M3/M4/M7</span>) use the <span>NVIC</span> (Nested Vectored Interrupt Controller) to support interrupt nesting and priority management. It employs a grouping mechanism that divides interrupt priority into two parts: Preemption Priority: Determines whether the current interrupt can interrupt other interrupts. Subpriority: Determines the response order when preemption priorities are … Read more
Tasks are the smallest units of execution competing for system resources. Multiple tasks with the same priority can share the same priority level. In FreeRTOS, if configUSE_TIME_SLICING is defined as 1, then multiple ready tasks with the same priority will share the processor in a time-slicing manner, where one time slice equals one tick. Task … Read more
In version 6.12, the enhancement of many AD items naturally led us to believe that ADC heroes would rise. However, if we break down these enhanced items — Infinity Edge and Bloodthirster both increased in attack power, and the Armor Penetration Bow also added attack power, which means that crit-based heroes have a greater chance … Read more
Today, Pi Zi Heng will share with you the three implementations of critical section protection in Cortex-M bare metal. Those who have worked with embedded systems and RTOS are likely familiar with the function codes OS_ENTER_CRITICAL() and OS_EXIT_CRITICAL(). In RTOS, multi-tasking (process) handling often occurs, and in some situations, certain special operations (such as Flash … Read more
Source | Pi Zi Heng Embedded Today, I will share with you three implementations of critical section protection in Cortex-M bare metal environments. Friends who have worked with embedded systems and RTOS are probably very familiar with the functionality codes OS_ENTER_CRITICAL() and OS_EXIT_CRITICAL(). In an RTOS, there are often multi-task (process) handling situations where certain … Read more