What Is the MPU of Cortex-M Core?

Everyone often sees abbreviations like MCU, MPU, MMU, but do you know what MPU is?

1Introduction

I wonder if everyone has paid attention to some content about the Cortex-M core; most models of STM32 have an MPU.

The MPU is an optional component of Cortex-M. For STM32F1, only the STM32F10X_XL series chips have this Memory Protection Unit, while other STM32F1 chips do not.

Many people may only know a little about the MPU; today, I will write some content about the MPU to help everyone further understand it.

Understanding MPU and Its Function

MPU: Memory Protection Unit, the memory protection unit.

The MPU memory protection unit can implement protection for memory (mainly memory and peripheral registers) to make software more robust and reliable. It must be programmed according to needs before use. If the MPU is not enabled, it is equivalent to the system not having an MPU.

The MPU has the following capabilities that can improve system reliability:

Prevent user applications from corrupting data used by the operating system.
Prevent one task from accessing the data area of another task, thus isolating tasks.
Set critical data areas as read-only, fundamentally eliminating the possibility of corruption.
Detect unexpected memory access, such as stack overflow and array out-of-bounds.
Additionally, the MPU can set other access attributes for memory regions, such as whether they are bufferable or cacheable.

Understanding Wild Pointers

We have briefly understood the functions of the MPU; in fact, it has an important function of protecting memory accessed by pointers. So, let’s understand pointers and wild pointers.

To review, what is a pointer? A pointer is actually an unsigned integer in memory, but its value is given a special interpretation: it represents the address of a variable or function. That’s why it is vividly called a “pointer,” as if it points to a certain house. Before using a pointer, it must first point to something meaningful and permissible for the program to use—data and code. A “wild pointer” refers to a pointer variable whose value exceeds the legal range, causing it to “point aimlessly.” Logic errors in the program, array out-of-bounds, stack overflow, uninitialized pointers, improper handling of caches and buffers, chaotic conditions in a multi-tasking environment, or even malicious destruction can all create wild pointers. If a wild pointer is used to read or modify memory, the locations being read or modified are unpredictable. The former leads to reading corrupted data, while the latter can damage data of unknown purposes. This often leads to inexplicable functional confusion in the system, and in severe cases, it can cause the system to lose control or crash without warning or reason.

A wild pointer is like “a thorn in the flesh, a maggot in the sauce”: a single wild pointer can destroy the entire system, and it is extremely concealed, making it difficult to locate the source of the wild pointer through symptoms. It may even be impossible to determine whether symptoms are caused by a wild pointer (as programs grow larger, there are many other bugs that can lead to the same symptoms). For typical microcontroller systems, there is no way to prevent the damage caused by wild pointers; it entirely relies on the programmer’s quality and self-discipline. However, even the wisest can make mistakes. Especially when the program scale becomes large, the complexity increases exponentially, with countless threads tangled together. Even the cautious Zhuge Liang or the genius Bill Gates cannot guarantee that there are no oversights.

— From the CM3 Core Translation Author

Further Understanding MPU

When the MPU executes its functions, it operates on the so-called “region” basis.A region is actually a segment of contiguous addresses, but their positions and ranges must meet certain constraints (alignment, minimum capacity, etc.).

The CM3 MPU supports a total of 8 regions and allows each region to be further divided into smaller “subregions.” Additionally, a “background region” (i.e., the entire address space when the MPU is not active) can be enabled, but it is only accessible to privileged levels. After enabling the MPU, access to address ranges outside the defined regions or unauthorized regions is prohibited. Otherwise, it will be treated as an “access violation,” triggering a MemManage fault.

The regions defined by the MPU can overlap. If a block of memory falls within multiple regions, the access attributes and permissions will be determined by the region with the highest number. For example, if region 1 overlaps with region 4, the overlapping part is controlled by region 4.

The MPU can protect up to 16 memory areas. If the area is at least 256 bytes, these regions can have 8 subregions. The size of the subregions is always equal and can be enabled or disabled by the subregion number. Since the minimum region size is driven by the cache line length (32 bytes), 8 subregions of 32 bytes correspond to a size of 256 bytes.

MPU Learning Resources

The above only further helps everyone understand the MPU memory protection unit. For those who want to delve deeper, more relevant materials need to be consulted.

To learn MPU programming, it is necessary to master the MPU-related registers. The MPU registers are relatively few; here are the Cortex-M core technical reference manual, and the STM32 application note Managing Memory Protection Unit (MPU) in STM32 MCUs, and the programming manual that discuss MPU knowledge.

For easier understanding, here are a few points.

1. STM32 Memory Mapping

2. MPU Register Set

Operating the MPU is like operating a regular STM32 peripheral, accomplished by accessing its several registers. The MPU registers are shown in the table below.

MPU registers may seem complex, which is natural since they have risen to the level of memory management. However, if we are well-prepared—having already thought about how to partition memory—this is just a tedious task that tests attention to detail. Typically, in systems where the MPU is enabled, the following regions are present.

Privileged program code (such as OS kernel and exception service routines)

User-level program code

Privileged program data storage, located in the code area (data_stack)

User-level program data storage, located in the code area (data_stack)

General data storage, located in other memory areas (e.g., SRAM)

System device area, accessible only to privileged levels, such as the NVIC and all address ranges of the MPU registers

General peripheral area, such as UART, ADC, etc.

3. Cube HAL MPU Configuration Example

void MPU_RegionConfig(void){  MPU_Region_InitTypeDef MPU_InitStruct;  /* Disable MPU */  HAL_MPU_Disable();  /* Configure RAM region as Region N°0, 8kB of size and R/W region */  MPU_InitStruct.Enable = MPU_REGION_ENABLE;  MPU_InitStruct.BaseAddress = 0x20000000;  MPU_InitStruct.Size = MPU_REGION_SIZE_8KB;  MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS;  MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE;  MPU_InitStruct.IsCacheable = MPU_ACCESS_CACHEABLE;  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;  MPU_InitStruct.Number = MPU_REGION_NUMBER0;  MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL0;  MPU_InitStruct.SubRegionDisable = 0x00;  MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;  HAL_MPU_ConfigRegion(&MPU_InitStruct);  /* Configure FLASH region as REGION N°1, 1MB of size and R/W region */  MPU_InitStruct.BaseAddress = 0x08000000;  MPU_InitStruct.Size = MPU_REGION_SIZE_1MB;  MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE;  MPU_InitStruct.Number = MPU_REGION_NUMBER1;  HAL_MPU_ConfigRegion(&MPU_InitStruct);  /* Configure FMC region as REGION N°2, 0.5GB of size, R/W region */  MPU_InitStruct.BaseAddress = 0x60000000;  MPU_InitStruct.Size = MPU_REGION_SIZE_512MB;  MPU_InitStruct.IsShareable = MPU_ACCESS_SHAREABLE;  MPU_InitStruct.Number = MPU_REGION_NUMBER2;  HAL_MPU_ConfigRegion(&MPU_InitStruct);  /* Enable MPU */  HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);}

If you want to learn more about MPU, you can refer to the CM3 technical manual, as well as STM32 application manuals and programming manuals.

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1Introduction

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