One of the core challenges of solid-state transformers (SST) is that the voltage withstand capability of individual power semiconductor devices is far from sufficient to directly handle the voltage levels of medium-voltage distribution networks (such as 10kV). Addressing this voltage limitation is not reliant on a single technology, but rather a set of “combinations“.
The main approaches can be summarized into two categories:“Internal“ (through innovations in device technology and materials) and “External Collaboration“ (through circuit topology).
1. External Collaboration: Solving through Circuit Topology (the most mainstream and mature method currently)
This is currently the most reliable and widely applied approach in the medium to high voltage power sector. Its core principle is “Unity is Strength“, by connecting multiple devices in series or modular combinations to share the high voltage.
1. Series Connection of Devices
1.1 Principle: Directly connecting multiple switching devices (such as IGBT or SiC MOSFET) in series to jointly withstand high voltage. This is similar to connecting multiple batteries in series to achieve high voltage.
1.2 Key Challenges:
1.2.1Dynamic Voltage Balancing: Due to slight differences in device parameters (such as switching speed and junction capacitance), during high-speed switching, the voltage cannot be evenly distributed among the devices, which may lead to overvoltage damage to a specific device.
1.2.2Solutions: Complex active or passive voltage balancing circuits (such as buffering circuits and gate control) are required to ensure voltage balance. This increases the complexity and cost of the system.
2. Multilevel Converter Topology (the mainstream choice for SST)
2.1 Principle: This is a more advanced and better-performing “modular series” concept. It approaches the sine wave in a stepwise manner by constructing multiple voltage levels, allowing each switching device to only withstand a small portion of the total DC bus voltage.
2.2 Common Topologies:
2.2.1Modular Multilevel Converter (MMC): This is one of the most favored topologies for medium to high voltage SST. It consists of numerous identical submodules (SM) connected in series. Each submodule typically contains a capacitor and several switching devices. The devices only withstand the voltage of the submodule capacitor, thus perfectly solving the voltage withstand issue. The advantages are modularity, easy scalability, and extremely high output waveform quality.
2.2.2Flying Capacitor Multilevel Converter (FCMC) and Diode-Clamped Multilevel Converter (DNPC): These are also commonly used multilevel structures, but when the number of levels is high, the structure and control become complex.
Advantages: Essentially solves the voltage withstand problem of individual devices while significantly improving the quality of the output voltage waveform and reducing the size of the filter.
3. Input Side Series, Output Side Parallel (ISOP) Cascaded Structure
3.1 Principle: This involves connecting multiple complete, independent power conversion units (such as DAB, dual active bridge) in series on the input side to withstand high voltage, while connecting them in parallel on the output side to provide high current. This is a system-level modular solution.
Advantages: Each unit is a low-voltage standard module, making design, manufacturing, and maintenance simple, with high reliability (a failure in one unit does not affect system operation). This is very suitable for the modular design concept of SST.
2. Internal Reinforcement: Through Technological Innovations of the Devices (Future Development Direction)
This fundamentally addresses the problem from the perspective of materials science and semiconductor physics.
1. Use of Wide Bandgap Semiconductor Devices:
1.1 Principle: New generation semiconductor materials such as silicon carbide (SiC) and gallium nitride (GaN) have a critical breakdown electric field strength that is an order of magnitude higher than that of traditional silicon (Si). This means that at the same thickness, SiC devices can achieve much higher voltage withstand levels than Si devices.
Advantages:
Higher Voltage Withstand: The voltage withstand of a single SiC MOSFET can easily exceed 10kV, while silicon IGBT typically falls below 6.5kV. This allows for the simplification of SST topology (reducing the number of series connections).
Higher Efficiency: Wide bandgap devices have lower conduction resistance and switching losses, allowing SST to operate at higher frequencies, significantly reducing the size and weight of magnetic components (transformers, inductors).
Current Status: High-voltage SiC devices are currently a hot topic in the research and development of SST, considered a key technology for the future disruption of SST design.
2. Super Junction Technology:
Principle: This is an advanced technology for silicon-based MOSFETs, which alters the distribution of the electric field by introducing alternating P and N type pillar regions, thereby significantly enhancing the voltage withstand capability of the device while maintaining low conduction resistance.
Applications: Mainly applied to devices with voltage withstand in the range of 600V-900V, used in the low-voltage side or lower power levels of SST, but still insufficient for direct application in medium voltage.
3. Comparison
|
Solution Approach |
Specific Methods |
Core Principles |
Advantages |
Disadvantages |
Maturity |
|
External Collaboration |
Series Connection of Devices |
Multiple devices share the voltage |
Simple principle, can be quickly implemented |
Dynamic voltage balancing is difficult, control is complex, reliability challenges are significant |
Mature |
|
Multilevel Converter (such as MMC) |
Modular submodules in series, each module withstands low voltage |
Modular, easy to expand, good waveform quality, high reliability |
Many submodules, complex control, higher cost |
Current Mainstream/Mature |
|
|
Cascaded Structure (such as ISOP) |
Standard conversion unit input in series |
Modular, strong fault tolerance, simple design |
Requires multiple isolation transformers, system size may be large |
Mature |
|
|
Internal (Device Innovation) |
Wide Bandgap Semiconductors (SiC/GaN) |
Materials themselves have high breakdown electric fields, inherently strong voltage withstand |
High voltage withstand, high efficiency, high frequency, can simplify topology |
High cost, drive and protection technologies are still developing |
Future Direction/Rapidly Developing |
|
Super Junction Technology |
Optimizing the internal electric field distribution of silicon devices |
Performance improvement compared to traditional silicon devices |
Voltage withstand levels have an upper limit, difficult to handle medium voltage |
Mature (used in low voltage fields) |
How to solve the voltage limitations of power semiconductor devices in SST?
1.The most practical and reliable solution at this stage is to adopt “multilevel converter topology“ (especially MMC) or “input series output parallel“ cascaded structure. These methods are based on mature silicon-based devices and cleverly circumvent the voltage withstand bottleneck of individual devices through system architecture.
2.The fundamental solution for the future lies in the maturity and cost reduction of high-voltage wide bandgap semiconductor devices (especially SiC). At that time, the topology of SST can be greatly simplified, and efficiency and power density will achieve a leap forward.
In the actual research and development of SST, it is often the case that multiple technologies are combined, for example, using MMC topology based on SiC devices to achieve optimal performance and reliability.
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