| Chip, Integrated Circuit, IC |
An integrated circuit (IC) is a miniature electronic device or component that connects transistors, resistors, capacitors, and inductors required for a circuit on a single silicon chip according to design specifications, forming a circuit with specific functions. IC is the abbreviation for Integrated Circuit, and the term “chip” is a colloquial term for integrated circuits. |
| Artificial Intelligence, AI |
Abbreviation for Artificial Intelligence, a branch of computer science that extends the capabilities of machines by simulating and enhancing human and natural intelligence functions, enabling them to achieve human-like perception (such as vision and speech), cognitive functions (like natural language understanding), or problem-solving abilities (using methods like machine learning). |
| Integrated Circuit Design, IC Design |
The entire design process of an integrated circuit before manufacturing, including circuit function definition, structural design, circuit design, circuit verification and simulation, and layout design. |
| Smart Chip, AI Chip |
Smart chips or AI chips are specifically designed for the field of artificial intelligence, including two types: general-purpose smart chips designed for diverse applications in AI, which have good versatility for various AI technologies such as vision, speech, natural language processing, and traditional machine learning; and dedicated smart chips designed for specific, concrete, and relatively singular AI applications. |
| IP |
Abbreviation for Intellectual Property, referring to the exclusive rights enjoyed by rights holders over the results of their intellectual labor and the marks and reputation in their business activities; in this prospectus, smart processor IP refers to the product-level implementation scheme of smart processors, consisting of core architecture, code, and documentation. |
| Accelerator Card |
A board product used to accelerate applications in specific fields, whose core component is the computing chip on the board, typically connected to the system through additional interfaces of the host (such as PCIe). Common accelerator card products include graphics accelerator cards, video codec accelerator cards, and AI accelerator cards. |
| Cloud |
In computing, it generally refers to remote processing concentrated in large-scale data centers. This processing scheme is called cloud processing, with the processing location being the cloud. |
| Terminal |
In contrast to the cloud, it generally refers to devices that individuals can directly access or use without remote access, or devices that are directly integrated with data or sensors, such as smartphones, smart speakers, and smartwatches. |
| Edge |
On the side close to the data source, data is aggregated through gateways and processed by computers. |
| Ecology |
In computing, ecology generally refers to the development tools, developers, and a series of systems and applications based on instruction sets or processor architectures. The prosperity of the ecology is crucial for the success of the instruction set or processor architecture, with indicators including the completeness of software toolchains and upper-layer applications, the number of developers and users, and application scenarios. |
| Computational Power |
Typically measured by the number of basic operations a chip can perform per second. A chip with strong computational power takes less time to execute the same program compared to weaker chips of the same type. |
| TOPS |
Abbreviation for Tera Operations Per Second, a unit of processing power, where 1 TOPS represents one trillion basic operations per second. |
| Data Center |
A comprehensive set of complex information technology infrastructure, mainly consisting of computer systems and other supporting devices (such as communication and storage systems), including related auxiliary devices and facilities. It provides users with computing and data storage, server hosting, and other services, serving as a key physical carrier for internet and cloud computing operations. |
| SoC |
Abbreviation for System on Chip, referring to a chip that integrates different functional sub-modules into a complete system suitable for target application scenarios. System on Chips often integrate various components, such as a mobile SoC that includes a general-purpose processor, hardware codec units, and baseband. |
| Fixed Point |
Most numerical data processed by computers have decimal points, with the decimal point conventionally implied at a fixed position, referred to as fixed-point representation, or simply fixed point or fixed-point number. |
| Floating Point |
Most numerical data processed by computers have decimal points, with the position of the decimal point being variable, referred to as floating-point representation, or simply floating point or floating-point number, which generally follows the IEEE 754 standard. |
| Quasi-Floating Point |
A non-IEEE standard format of floating-point data type defined according to the data characteristics of deep learning, such as commonly seen bfloat16 and bfloat19, as well as the high-precision and high-efficiency quasi-floating-point data types customized by Cambricon. |
| Training |
In the fields of machine learning or artificial intelligence, the process of obtaining corresponding machine learning/AI model parameters through a large number of labeled samples and certain methods. |
| Inference |
In the fields of machine learning or artificial intelligence, the process of predicting new data labels using a pre-trained model (where model parameters have been obtained through training). |
| Sparsity Theoretical Peak |
In neural networks, where there are many zeros (weights or neurons), since zeros do not affect the result in multiplication and addition operations, smart chips can skip the computation of zeros through specialized hardware design. The sparsity theoretical peak refers to the maximum performance that smart chips can provide when there are enough zeros and these hardware are enabled. |
| Non-Sparsity Theoretical Peak |
In neural networks, where there are many zeros (weights or neurons), since zeros do not affect the result in multiplication and addition operations, smart chips can skip the computation of zeros through specialized hardware design. The non-sparsity theoretical peak refers to the maximum performance that smart chips can provide when these zero-skipping hardware are not present or not enabled. |
| INT2, INT4, INT8, INT16 |
Performing 2-bit, 4-bit, 8-bit, and 16-bit fixed-point operations. |
| FP16, FP32 |
Performing 16-bit and 32-bit floating-point operations. |
| BF16 |
Performing 16-bit brain floating-point operations. |
| IoT |
Abbreviation for Internet of Things, referring to the real-time collection of information from the physical world through various information sensors, and the transmission of information over networks to achieve ubiquitous information connectivity and intelligent perception and management between objects and people. |
| Instruction Set |
A complete set of instructions that a processor chip can execute, serving as the most important and direct interface between computer hardware and software. |
| TensorFlow |
A data flow programming-based artificial intelligence deep learning framework developed and maintained by Google’s AI team, widely used for programming implementations of various AI algorithms, especially deep learning algorithms. |
| PyTorch |
An open-source machine learning library and framework for Python, launched by Facebook AI Research (FAIR). |
| Caffe |
A deep learning framework that combines expressiveness, speed, and modular thinking, developed by a research group at the University of California, Berkeley. |
| Wafer |
Also known as Wafer, disc, or chip, it is a round silicon wafer used in the semiconductor industry for integrated circuit manufacturing. Various circuit component structures can be processed on the silicon wafer to become integrated circuit products with specific functions. |
| Photomask |
Also known as Mask, photomask, or mask plate, it is a mold used to print circuits on silicon wafers during semiconductor chip manufacturing. Photomasks are produced based on the chip design layout provided by the chip design company and are used by wafer manufacturers for wafer production after completion. |
| Integrated Circuit Packaging |
The process of using wires and various connection methods to lead out pins from the bare chip (Die) cut from the wafer and fixing it into a package to form a usable chip product. Integrated circuit packaging not only provides electrical connections to the outside but also physically protects the integrated circuit, ensuring the chip functions normally and reliably. |
| Integrated Circuit Testing |
Includes integrated circuit wafer testing, finished product testing, reliability testing, and failure analysis. |
| Tape Out |
The entire process of a chip design company submitting the chip design layout to wafer manufacturing and obtaining real chips. Tape out can verify whether the chip meets the expected functions and performance: if the tape out is successful, large-scale production of the chip can proceed; otherwise, the reasons for failure must be identified, the design optimized, and the tape out repeated. |
| OEM |
Abbreviation for Original Equipment Manufacturer, referring to a business model where the brand owner does not directly produce products but is responsible for designing and developing products using their key core technologies while controlling sales channels. |
| IDM |
Abbreviation for Integrated Design and Manufacture, referring to a business model where integrated circuit design, wafer manufacturing, packaging testing, and sales are completed by the same company. |
| Fabless |
Refers to chip design companies (or the business model of such companies) that only engage in chip design and sales, while outsourcing wafer manufacturing, packaging, and testing to specialized manufacturers. |
| Foundry |
A wafer foundry, referring to companies that specialize in chip manufacturing. |
| OSAT |
Abbreviation for Outsourced Semiconductor Assembly and Test, referring to companies that specialize in semiconductor packaging and testing. |
| PDT |
Abbreviation for Product Development Team, referring to a model, concept, and method of product development. |
| EDA |
Abbreviation for Electronic Design Automation, referring to a class of technologies that assist and accelerate the design of electronic products (including integrated circuits) using computers, integrating methods from microelectronics and computer science. |
| CMOS |
Abbreviation for Complementary Metal Oxide Semiconductor, a commonly used technology for manufacturing large-scale integrated circuit chips or chips made using this technology. |
| FinFet |
Abbreviation for Fin Field-Effect Transistor, a new type of complementary metal-oxide-semiconductor transistor, also referring to the integrated circuit manufacturing process that incorporates such transistors. FinFet technology significantly increases the transistor density of chips and greatly enhances the performance of processor chips. |
| PCB |
Abbreviation for Printed Circuit Board, also known as a printed circuit board, is the support and electrical connection carrier for electronic components. |
| Deep Learning |
A general term for a class of mainstream algorithms in artificial intelligence, which can train deep neural network models (i.e., deep neural networks) with many hidden layers based on massive data, enabling them to perform specific AI tasks such as image recognition and speech recognition. |
| Neural Network |
Abbreviated as artificial neural networks, a class of AI models inspired by the basic structure of biological brains, applicable in a wide range of fields such as vision, speech, and natural language processing, allowing computers to achieve human-like perception and relatively simple initial cognitive functions. |
| CPU |
Abbreviation for Central Processing Unit, the core chip in personal computers and servers, responsible for general computing or control tasks. |
| GPU |
Abbreviation for Graphic Processing Unit, a processor chip used for image and graphics calculations in personal computers, gaming devices, and mobile terminals (such as tablets and smartphones). |
| DSP |
Abbreviation for Digital Signal Processing, referring to chips capable of performing digital signal processing tasks. |
| FPGA |
Abbreviation for Field Programmable Gate Array, a type of chip that can be programmed at the hardware level. |
| ASIC |
Abbreviation for Application Specific Integrated Circuit, referring to integrated circuits specifically designed and manufactured to meet the needs of specific application scenarios. |
| MCU |
Abbreviation for Microcontroller Unit, a type of small computer system that integrates CPU, counters, analog-to-digital converters, and other lightweight modules into a small-sized chip. Microcontroller units typically provide limited computing power and handle relatively small amounts of data, widely used in the IoT industry. |
| TPU |
Abbreviation for Tensor Processing Unit, a smart chip customized by Google for artificial intelligence machine learning tasks. |
| NPU |
Abbreviation for Neural-network Processing Unit, a processor specifically designed to accelerate artificial neural network models. |
| IaaS |
Abbreviation for Infrastructure as a Service, referring to providing IT infrastructure as a service over the network to customers. |
| PaaS |
Abbreviation for Platform as a Service, referring to providing software development platforms as a service to users. |
| SaaS |
Abbreviation for Software as a Service, referring to providing software services over the network. |
| Performance-Power Ratio, Energy Efficiency Ratio |
A measure of the energy conversion efficiency of computer systems or chips, commonly indicated by the computational power provided per unit of power consumption. |
| DRAM |
Abbreviation for Dynamic Random Access Memory, a type of semiconductor memory. |
| Memory |
Devices used to store programs and data in computer systems, capable of storing and retrieving information based on addresses specified by the controller. |
| DDR |
Abbreviation for Double Data Rate, a technology used in memory to double the data rate. |
| PCIe |
Abbreviation for Peripheral Component Interconnect Express, a high-speed computer expansion bus standard initially proposed by Intel in 2001, now widely used for interconnecting CPUs and coprocessor chips. |
| PCT |
Abbreviation for Patent Cooperation Treaty, an international cooperation treaty in the patent field. By submitting an international patent application under the PCT, applicants can simultaneously obtain priority for applying for that patent in most countries worldwide. |
| SerDes |
Abbreviation for Serializer/Deserializer, a technology for high-speed data communication between chips. |
| CCLINK |
Abbreviation for Cambricon Chip-to-chip Link, a high-speed interconnect bus and protocol developed by Cambricon, supporting fast and flexible information communication and data exchange between chips. |
| DFT |
Abbreviation for Design For Testability, referring to the addition of testing logic during the chip design phase to facilitate and expedite chip testing and debugging. |
| MBIST |
Abbreviation for Memory Built-in Self Test, a technology providing built-in self-test circuits for memory units or arrays, facilitating problem localization and generating test vectors. |