The “Nano-Level Polishing” of Chips: How CMP Technology Turns Silicon Wafers into “Mirror Surfaces”?

In semiconductor manufacturing, there is a technology known as “Global Planarization Unique Solution”—it can reduce the roughness of silicon wafer surfaces to the nanometer level, allowing for precise etching of 7nm and 5nm circuits; in computer hard drives, it enables the flying height of the read/write head to be as low as 10nm without scratching the disk surface. This technology isChemical Mechanical Polishing (CMP) technology. Today, we will break down this “super-precision processing black technology” from its technical principles, core elements, existing challenges, to future directions.

1. First, understand: Why is CMP the “irreplaceable global planarization technology”?

Before CMP emerged, semiconductor surface planarization relied on mechanical polishing, thermal reflow, and other methods, but these were all “local flattening”—they could only handle roughness from a few micrometers to tens of micrometers, which was insufficient for chip feature sizes below 0.35μm.

In 1991, IBM first applied CMP in the production of 64Mb DRAM, completely solving this problem. Its core principle is quite ingenious:combining “mechanical grinding” and “chemical etching”—the nano abrasives (such as SiO₂, Al₂O₃) in the polishing slurry are responsible for physical grinding, while the oxidants are responsible for chemical etching. The combination of both allows for efficient material removal and surface flattening to the nanometer level.

Today, CMP has become a “must-have technology” in fields such as IC chip manufacturing, computer hard drives, MEMS (Micro-Electro-Mechanical Systems), and optical glass:

  • Chip manufacturing: The local flatness requirement for 7nm process silicon wafers is ≤0.14μm, achieved entirely through CMP;
  • Hard disk storage: The flying height of the read/write head is only 10nm, and the surface roughness must be <0.1nm, which is only achievable through CMP;
  • Optical devices: The ultra-smooth surfaces of optical communication crystals and flat panel displays also rely on CMP processing.

2. The “Three Core Elements” of CMP: Equipment, Polishing Slurry, and Polishing Pads

The effectiveness of CMP relies heavily on the compatibility of these three elements—currently, these three core components are primarily imported, while domestic production is catching up.

1. Polishing Machine: The “Operating Platform” of CMP

  • Function: Provides stable pressure, rotation speed, and controls the flow of polishing slurry, serving as the “stage” for processing;
  • Current Status: Mainstream brands include Applied Materials from the USA and Ebara from Japan, which are evolving from single-head/double-head to multi-head systems, and are exploring new structures such as track polishing and linear polishing;
  • Key Requirements: For processes below 0.18μm, there is a need for “dry in, dry out” (to avoid moisture contamination), automatic endpoint detection, and multi-process integration. For example, dedicated equipment for copper interconnect CMP is still under development.

2. Polishing Slurry: The “Abrasive + Etchant” of CMP

The polishing slurry is the “core ammunition” of CMP, composed ofnano abrasives, oxidants, and surfactants, each component affects the polishing effect:

  • Abrasives: Determine grinding efficiency and surface quality. For example, when the particle size of SiO₂ abrasives is 80nm, the silicon wafer removal rate is highest, and the surface is the smoothest; Al₂O₃ abrasives are suitable for metal polishing, but large particles must be controlled (otherwise scratches will occur);
  • Oxidants: Responsible for chemical etching. For example, hydrogen peroxide is used for copper polishing, while KIO₃ is used for tungsten polishing. Different materials require matching with different oxidants;
  • pH Value: Affects the strength of chemical action. For example, oxide polishing requires pH > 10 (alkaline), while metal polishing requires pH < 3 (acidic);
  • Pain Points: Abrasives tend to agglomerate (leading to scratches), large particles are difficult to remove, and dispersion stability is poor, all of which can reduce chip yield.

3. Polishing Pads: The “Cloth + Delivery Tube” of CMP

Polishing pads are made of porous materials such as polyurethane or polycarbonate, serving three functions: storing polishing slurry, delivering abrasives to the silicon wafer surface, and removing grinding waste;

  • Key Characteristics: Hardness (hard pads have a longer planarization distance, while soft pads have better uniformity), porosity (affects polishing slurry storage), and wear resistance;
  • Common Issues: During use, pads can become “glazed” (the surface becomes flat and cannot store slurry), requiring regular maintenance to restore roughness; physical changes (enlarged pores, decreased roughness) after use are more pronounced than chemical changes, directly affecting lifespan;
  • Optimization Directions: By mixing soft and hard pads and adding elastic backing membranes, balance can be achieved between planarization capability and uniformity.

3. The “Complex Mechanism” of CMP: An Unsolved Problem Across Multiple Disciplines

CMP may seem like “grinding + etching”, but it actually involves tribology, chemistry, fluid mechanics, and contact mechanics. To date, there is no complete theoretical model, and there are currently four main research approaches:

  1. Phenomenological Models: Empirical formulas based on experimental results, such as the Preston equation from 1927, which links removal rate to pressure and rotation speed, but does not reveal the essence;
  1. Fluid Mechanics Models: Calculate the thickness of the polishing liquid film and pressure distribution. For example, some believe the liquid film thickness is 45~95μm (fluid lubrication), while others have found it to be boundary lubrication, with no consensus to date;
  1. Contact Mechanics Models: Analyze the contact and rolling of abrasives with the silicon wafer, explaining wear mechanisms, such as simulating pressure distribution based on elastic contact theory;
  1. Multi-Theory Combined Models: Combine contact mechanics and fluid mechanics, but most do not consider chemical actions, making it impossible to fully explain actual phenomena.

In simple terms: The mechanism of CMP is like a “black box”—we know the inputs (pressure, rotation speed, polishing slurry) and outputs (surface flatness), but the intermediate processes of “how abrasives move and how chemical etching cooperates with mechanical actions” are not yet fully understood.

4. The “Four Major Pain Points” of CMP: Key Constraints on Precision Improvement

Despite CMP being used for 30 years, many issues remain unresolved, directly affecting the processing of the next generation of chips and hard drives:

  1. Unclear Material Removal Mechanisms: For example, is the lubrication between the silicon wafer and polishing pad fluid lubrication or boundary lubrication? How to control the balance between chemical etching and mechanical grinding? Without clarity, precise control of processing effects is impossible;
  1. Unknown Movement of Nanoparticles: How do the abrasives in the polishing slurry collide with the silicon wafer? Could this lead to excessive local stress and defects? These directly affect surface quality;
  1. Difficult Control of Defect Generation: Nano-level defects such as scratches, dents, and pitting can lead to chip failure. For example, the “dents” issue in copper CMP has yet to be precisely identified, with oxidant concentration and abrasive hardness both having an impact;
  1. Difficulties in Achieving Selective Polishing: The chip surface contains various materials such as insulators and metals. How can CMP selectively polish specific materials without damaging others? For example, selective polishing of copper and SiO₂ remains a challenge in the industry.

5. Future Directions: Particle-Free Polishing—A “New Solution” to Solve Scratches and Environmental Issues

The biggest problem with traditional CMP is “abrasives causing scratches” and “waste polishing slurry pollution,” whileparticle-free polishinghas become a breakthrough direction:

  • Principle: The polishing slurry contains no solid abrasives at all, relying on strong oxidants (such as hydrogen peroxide) and the friction chemical reactions of the polishing pad to achieve material removal;
  • Advantages:
  1. No Scratches: Completely solves surface defects caused by abrasives;
  1. Environmentally Friendly: Reduces waste polishing slurry treatment costs and avoids abrasive pollution;
  1. Higher Precision: Can meet processes below 0.10μm, with the depth of dents and corrosion in copper polishing being only 1/5 of that in traditional CMP;
  • Challenges: Mechanisms are unclear (the specific processes of friction chemical reactions are not well understood), and polishing slurry and pads need to be redesigned, which are still under research.

Conclusion: CMP—The Necessary Path from “Usable” to “Well-Used”

As the only technology capable of achieving global planarization, CMP supports the transition of chips from micrometer to nanometer levels. However, it still faces the issue of “theory lagging behind practice”—the industry has used CMP to produce 7nm chips, while academia has yet to fully understand its mechanisms.

In the future, breakthroughs in CMP will require two aspects: first, in-depth research on fundamental issues such as material removal and nanoparticle movement to establish a complete theoretical model; second, the development of new technologies such as particle-free polishing to solve engineering challenges like scratches and environmental issues. For the semiconductor industry, the improvement of CMP precision is the “cornerstone” of chip performance enhancement—after all, only silicon wafers as smooth as a “mirror” can etch out more precise circuits.

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