The “Dongshan Plan” aims to establish a comprehensive RISC-V talent development system that spans from basic education to higher education, through curriculum reform, hardware platforms, competitions, and internships, providing a systematic teaching path for cultivating the next generation of RISC-V chip talent.
Chips are the core support in fields such as artificial intelligence, the Internet of Things, autonomous driving, and cloud computing. Without powerful chips, there can be no solid digital economy. RISC-V, as an open-source instruction set architecture, is gradually becoming an important choice for global research and industry due to its openness and flexibility. Actively participating in the RISC-V ecosystem helps promote the development of independent technologies and enhances influence in global industrial cooperation. The “Dongshan Plan” was initiated against this backdrop, focusing on RISC-V education, and is committed to uniting a wide range of educational partners to concentrate and share RISC-V teaching resources, cultivating more professionals interested in RISC-V technology at various learning stages.
Currently, in various aspects of RISC-V education, students have limited exposure to RISC-V hardware platforms and related software projects, with teaching being more theoretical and lacking practical hands-on opportunities. Meanwhile, the RISC-V training programs in schools do not meet the current industry’s huge demand for RISC-V talent, and only a small portion of students truly engage in the RISC-V open-source ecosystem.
The “Dongshan Plan” aims to build a teaching program focused on RISC-V, with the goal of training over 10,000 RISC-V talents covering middle school, undergraduate, and graduate students by 2030, and pushing the number of global RISC-V ecosystem contributions to exceed 100,000. This will allow more students to learn advanced technical skills in RISC-V courses, gradually advancing the construction of a highland for RISC-V talent in China and injecting new momentum into the open-source chip field. Its name is derived from the “Mencius: Heartfelt Efforts” which states: “Confucius ascended Dongshan and saw a smaller Lu; he ascended Taishan and saw a smaller world.” Only by standing high can one see far. The project is named to signify that conducting RISC-V education and cultivating RISC-V technical talents requires a broad vision and the courage to climb high.
Professor Xie Tao, a dual-appointed top talent at Fudan University and Secretary-General of the Shanghai Open Processor Industry Innovation Center, initiator of the “Songzhu Mei Plan,” will lead the program, with Professor Dai Hongjun from Shandong University serving as the executive head. The “Songzhu Mei Plan” is named after the term “Three Friends of Winter,” which symbolizes noble character and the ability to maintain vigorous vitality in the harsh winter. In the face of foreign restrictions on the development of AI, GPU, and other fields in China, the “Songzhu Mei Plan” aims to comprehensively break through multiple functional, performance, and community activity indicators for AI construction.
Among them, the “Dongshan Cluster” and the “Jiachen Plan” will serve as important support systems: On one hand, the “Jiachen Plan” aims to achieve a mature RISC-V hardware and software ecosystem similar to other mainstream architectures by 2036, gathering over 100 chip and solution manufacturers and more than 500 software development companies, providing rich RISC-V practical opportunities and teaching case references for the “Songzhu Mei Plan”; on the other hand, the “Dongshan Plan” relies on the “Dongshan Cluster” platform and the “Dongshan Pai” open-source project to build a three-in-one RISC-V talent training system of “hardware support + curriculum reform + practical empowerment,” continuously cultivating RISC-V talents and guiding the direction of industry-university-research development for the “Songzhu Mei Plan.”
The “Dongshan Plan” and the “Jiachen Plan” will further interact closely, concentrating efforts to achieve the goals of the Songzhu Mei Plan: Within three years (by November 2027), adapt AI accelerator cards/modules/IP based on the RISC-V AI instruction set extension for large-scale production (including training and inference, cloud-side and edge-side) to mainstream AI frameworks such as PyTorch, TensorFlow, Triton, and PaddlePaddle.
On the implementation level, the “Dongshan Plan” has several key actions:
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Freshmen: For freshmen, Shandong University will provide the “Dongshan Pai” development board as an “enrollment gift,” allowing students to engage with RISC-V technology and gain practical experience from the start. The “Dongshan Pai” distribution package is centered around the SG2002 chip, forming a complete development board through self-expansion of the baseboard and the addition of a camera. The university plans to distribute 1,000 sets of “Dongshan Pai” annually for five years, expecting to cover 5,000 sets.
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Hardware and Platform: Relying on the “Dongshan No. 1 Cluster” open to contributors in the RISC-V community, providing remote login and other teaching resource support for program members, continuously promoting the “Dongshan Pai Project” that integrates software and hardware capabilities, leveraging the practical value of the “Dongshan Pai” development board as a teaching tool, and increasing the R&D efforts of the “Dongshan No. 2 Cluster” to improve the construction of Shandong University’s important educational entity system for RISC-V.
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Curriculum System: Design a RISC-V enlightenment and research training path covering middle school students, high school students, and lower/higher grade university students, establishing a full-cycle training mechanism from the “Seedling Plan” to “Industry Elite,” promoting the integration of RISC-V knowledge into 10 core courses in universities, covering 100 colleges (departments) such as computer science, software, and electronic information integrated circuits, forming a three-dimensional course matrix of “required + elective + practical.”
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Practice and Competition: Organize the 2025 “Suan Neng Cup ICAN Innovation and Entrepreneurship Competition” RISC-V special track and other events, providing generous prizes for outstanding participants, and recommending students to participate in the “Jiachen Plan: Open Source Intern Joint Recruitment and Training” green internship channel, empowering students for comprehensive development.
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Ecological Network: Shandong University will build a RISC-V open-source ecological base facing Dongshan – the Dongshan Community, which will concentrate and present the open-source software that has been adapted and optimized by the “Dongshan Cluster” and “Dongshan Pai,” as well as resources for ongoing open-source projects, serving as teaching materials for program teachers and students, accelerating the implementation of RISC-V teaching tasks.
From the meaning of its name to the details of its implementation, the “Dongshan Plan” points to a single goal: to reserve more capable and experienced talents for China’s chip industry. In the next decade, as the plan gradually takes shape, the “Dongshan Plan” may become a shining business card for China in RISC-V talent cultivation.
Reference Links:
[1]https://www.view.sdu.edu.cn/info/1021/204664.htm[2]https://ic.sdu.edu.cn/info/1002/4542.htm[3]https://www.eeworld.com.cn/manufacture/eic701394.html