The report from Electronic Enthusiasts Network (by Zhou Kaiyang) states that in recent years, RISC-V has become one of the most significant ISAs in the industry, with over ten billion cores shipped. However, most of these cores are used in low-power IoT applications. As high-performance computing (HPC) has entered the Exascale era, whether RISC-V, as a latecomer, has the opportunity to secure a place in the HPC market is a question many manufacturers and developers are pondering.In fact, since last year, RISC-V has been making strides in this direction, with various high-performance RISC-V processors emerging, putting an end to the notion that RISC-V can only cater to mid-range and low-end markets. The RISC-V International Foundation also marked HPC as one of the strategic priority areas for RISC-V development last year. Academician Ni Guangnan emphasized at the XuanTie RISC-V Ecosystem Conference held last week that developing DSA-based new servers based on the RISC-V architecture is a significant opportunity for China. Given this, how do the existing high-performance RISC-V processors perform, and have they established a relevant ecosystem?
SiFive
As one of the core forces in the RISC-V IP ecosystem, SiFive has launched a series of RISC-V IP products, including the high-performance Performance series, the AI-focused Intelligence series, the Automotive series for the automotive market, and the Essential series aimed at low-power IoT applications.The P670, as the flagship product of SiFive’s Performance series, features a four-issue, 13-stage pipeline design, achieving over 50% performance improvement compared to the previous generation P550. Even when compared to Arm’s Cortex-A78, it still has a significant PPA advantage. The P670’s SpecINT2K6/GHz score exceeds 12, meeting the performance requirements of some commercial servers.Taking the SG2380 from Sanneng as an example, this is a 2.5GHz, 16-core RISC-V processor, planned for shipment this year as a high-performance large model accelerator. Sanneng claims this is a new attempt in LLM application architecture design for RISC-V, aimed at providing the strongest large model performance for mobile terminals, supporting large models like Llama and StableDiffusion. The SG2380 adopts a RISC-V CPU + TPU design, with the CPU part based on SiFive’s P670 and the TPU based on SiFive’s X280.To pursue higher performance and provide greater general computing power support for data centers, SiFive released the next-generation flagship product P870 last year. The P870 features a 6-wide, 4-issue design with a maximum configuration of 16 cores, achieving a SpecINT2K6/GHz score of over 18. SiFive states that the P870 is very suitable for consumer applications or can be paired with vector processors for data centers.To support the next generation of high-performance applications, SiFive has also developed a series of solutions around its RISC-V architecture, such as Hypervision expansion and system-level virtualization IP, WorldGuard system security protection, etc., which can further accelerate the deployment of RISC-V in HPC and data center applications.In addition, SiFive is already planning the next generation of high-performance cores, Napa. However, SiFive has not yet disclosed more information about Napa, but it is expected that Napa will support more core counts, adopt more advanced processes, and provide higher performance.
Pingtouge
Pingtouge’s C910, when launched in 2020, was one of the few high-performance RISC-V processors available at the time. This processor, which adopted a 12-stage pipeline design, achieved scores of 6 DIMPS/MHz and 7 Coremark/MHz with TSMC’s 12nm process support, surpassing Arm Cortex-A73 and other out-of-order RISC-V processors on the market at that time.This year, French cloud service provider Scaleway launched a cloud server instance based on the Pingtouge Yeying 1520 SoC, which is the first RISC-V product to enter a public commercial cloud service platform. The CPU part of the Yeying 1520 SoC is based on the four-core XuanTie C910 design. In addition to cloud instances, the world’s first RISC-V laptop, ROMA, is also based on the Yeying 1520 SoC, demonstrating the excellent general computing performance of the C910.In November last year, Pingtouge further released the C920, an enhanced AI computing 9-series XuanTie processor, maintaining the 12-stage pipeline design but adding an optional out-of-order vector processing unit, supporting the latest Vector 1.0 extension. Thanks to the new processing unit, the C920 is mainly applied in fields with high concurrent computing power demands, such as artificial intelligence, autonomous driving, and network communication.Sanneng Technology also developed the SG2042 based on the XuanTie C920, which is the world’s first commercially mass-produced 64-core RISC-V CPU. The SG2042 also supports dual-CPU interconnection, with a typical power consumption of only 120W. With the support of PLCT, the SG2042 has already been adapted to several operating systems, including Ubuntu, Arch Linux, openEuler, and Deepin, and common office software like Firefox and LibreOffice can also run successfully.At this year’s XuanTie RISC-V Ecosystem Conference, Zhang Jianfeng, the director of Damo Academy, revealed that the C930 will also be released within the year. The XuanTie C930 is compatible with the RVA24 Profile, with a maximum SpecINT2006 score of 15/GHz, raising expectations for future products based on the XuanTie C930 and whether Alibaba Cloud will start providing cloud instances based on RISC-V hardware.
Tenstorrent
As one of the hottest startups in the industry, Tenstorrent has become a regular at most RISC-V conferences. Based on the same design, Tenstorrent has released five RISC-V out-of-order processor IPs in just one year, among which Alastor and Ascalon are their high-performance RISC-V processor products, with the former targeting the client and edge markets, and the latter targeting servers, laptops, and the HPC market.The high-performance design of Tenstorrent’s RISC-V processor IP is mainly reflected in the width of the instruction set decoder. It is known that the mainstream x86 processor architecture designs currently do not exceed six-wide, for example, AMD’s Zen 4 is 4-wide, while Intel’s Golden Cove is 6-wide, and the aforementioned P870 is also only 6-wide.Alastor adopts a 6-wide instruction set decoder width design, while Ascalon achieves a 6-wide instruction set decoder width as well. This is naturally related to Tenstorrent’s “Apple background”; after all, both the current CEO, known as the silicon wizard Jim Keller, and Tenstorrent’s chief CPU architect Wei-Han Lien are key figures behind Apple’s wide CPU microarchitecture, with Apple M1, A14, and other chips’ CPUs adopting an 8-wide design.Ascalon integrates six ALUs, two FPUs, and two vector units, making it highly specified, thus mainly used for high-end servers, data centers, scientific computing, large-scale virtualization, and real-time data analysis in commercial high-performance computing applications. From the SpecINT2017/GHz scores provided by Tenstorrent last year (Alastor 1.9, Ascalon 2.2), Ascalon even outperformed all mainstream server CPU cores on the market, second only to the predicted AMD Zen 5 scores.In addition to general-purpose high-performance computing cores, Tenstorrent has developed dedicated cores for neural network inference and training, called Tensix. Tensix supports mainstream data precisions such as BF4, BF8, INT8, FP16, and even FP64. Compared to RISC-V IPs that only provide IP and Chiplet solutions, Tenstorrent will offer a complete solution for Tensix, including IP, Chiplet, chips, boards, systems, and cloud. However, the Grendel, which will be launched this year, will adopt a CPU + ML Chiplet design, which should bridge Tenstorrent’s existing RISC-V CPU and AI IP solutions.In addition to some development boards and expansion card products already available for purchase, Jim Keller is also tirelessly seeking ecosystem partners for Tenstorrent, whether it is foundries like Samsung and TSMC or Chiplet manufacturers like Silicon Box, all have reached cooperation with them.
Conclusion
In terms of absolute performance, RISC-V processors still have some gaps compared to mainstream x86 products. However, with the explosive growth in HPC and AI demand, in related application development, it has become clear that merely pursuing computational performance yields diminishing returns, while optimizing architecture and instruction sets brings increasingly higher benefits. The flexibility and customizability of the RISC-V architecture provide an opportunity for a leapfrog development.However, high-performance processors remain an essential stepping stone, so RISC-V still has a long way to go in the HPC field. Additionally, how to collaborate with the existing HPC supply chain and development ecosystem is something RISC-V must consider, such as how to work with server OEMs to create general server solutions according to OCP project standards; or how to quickly port many key HPC libraries and tools to the RISC-V hardware platform.
Disclaimer: This article is original from Electronic Enthusiasts Network, please indicate the source above when reprinting. For group communication, please add WeChat elecfans999, for submission, interview requests, please send an email to [email protected].
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