PCB, also known as Printed Circuit Board, enables the connection of electronic components and the realization of functions. It is also an important part of power circuit design. This article will introduce the basic rules for PCB layout and wiring.
Basic Rules for Component Layout
1. Layout according to circuit modules. Related circuits with the same function are called a module. Components within the circuit module should follow the principle of proximity and concentration, while digital and analog circuits should be separated.
2. No components or devices should be mounted within 1.27mm of positioning holes and standard holes, and no components should be mounted within 3.5mm (for M2.5) or 4mm (for M3) of screw mounting holes.
3. Avoid routing vias below components such as resistors, inductors (plug-in), and electrolytic capacitors to prevent short circuits between vias and component bodies after wave soldering.
4. The distance from the outer side of components to the edge of the board should be 5mm.
5. The distance from the outer side of the mounting pad of surface-mounted components to the outer side of adjacent plug-in components should be greater than 2mm.
6. Metal case components and metal parts (such as shield boxes) must not touch other components and must not be in close contact with printed lines or pads; the spacing should be greater than 2mm. The distance from positioning holes, fastener mounting holes, oval holes, and other square holes in the board to the edge of the board should be greater than 3mm.
7. Heating components must not be adjacent to wires and heat-sensitive components; high-heat devices should be evenly distributed.
8. Power sockets should be arranged around the printed board as much as possible, and the bus connection terminals connected to the power socket should be arranged on the same side. Special attention should be paid not to place power sockets and other soldered connectors between connectors to facilitate the soldering of these sockets, connectors, and power cable design. The spacing of power sockets and soldered connectors should consider the convenience of plugging and unplugging the power plug.
9. Arrangement of other components: All IC components should be aligned on one side, and the polarity of polarized components should be clearly marked. There should not be more than two directions of polarity markings on the same printed board, and if two directions appear, they should be mutually perpendicular.
10. The wiring on the board should be appropriately dense. When the difference in density is too large, a mesh copper foil should be used to fill it, with a grid size greater than 8mil (or 0.2mm).
11. There should be no vias on the solder pads of surface-mounted components to prevent solder paste loss and component cold soldering. Important signal lines should not pass between the pins of sockets.
12. Surface-mounted components should be aligned on one side, with consistent character orientation and package direction.
13. The polarity markings of polarized components on the same board should be kept consistent as much as possible.
Basic Wiring Rules for Components
1. Wiring is prohibited within 1mm of the edge of the PCB board and within 1mm around mounting holes.
2. Power lines should be as wide as possible and should not be less than 18mil; signal lines should not be less than 12mil; CPU input/output lines should not be less than 10mil (or 8mil); line spacing should not be less than 10mil.
3. Normal vias should not be less than 30mil.
4. Dual in-line: pad 60mil, hole diameter 40mil.
-
1/4W resistor: 51*55mil (0805 surface mount); for plug-in, pad 62mil, hole diameter 42mil.
-
Non-polar capacitor: 51*55mil (0805 surface mount); for plug-in, pad 50mil, hole diameter 28mil.
5. The power line and ground line should be as radial as possible, and the signal line should not have a loop.
Enhancing Anti-Interference Capability and Electromagnetic Compatibility
When developing electronic products with processors, how to enhance anti-interference capability and electromagnetic compatibility?
1. The following systems must pay special attention to electromagnetic interference
(1) Systems with particularly high microcontroller clock frequencies and very fast bus cycles.
(2) Systems containing high-power, high-current driving circuits, such as relays that produce sparks, high-current switches, etc.
(3) Systems that contain weak analog signal circuits and high-precision A/D conversion circuits.
2. To increase anti-electromagnetic interference capability, the following measures can be taken
(1) Choose microcontrollers with low frequency:
Choosing microcontrollers with low external clock frequencies can effectively reduce noise and enhance the system’s anti-interference capability. For square waves and sine waves of the same frequency, square waves contain much more high-frequency components than sine waves.
Although the amplitude of the high-frequency components of square waves is smaller than that of the fundamental wave, the higher the frequency, the more likely it is to emit noise. The high-frequency noise generated by microcontrollers is approximately three times the clock frequency.
(2) Reduce distortion in signal transmission
Microcontrollers are mainly manufactured using high-speed CMOS technology. The static input current at the signal input terminal is about 1mA, the input capacitance is around 10PF, and the input impedance is quite high. High-speed CMOS circuits have considerable load-driving capacity, meaning a significant output value. If the output of one gate is connected to the input of a high input impedance through a long line, reflection issues can become severe, leading to signal distortion and increased system noise. When Tpd>Tr, it becomes a transmission line issue, and signal reflection, impedance matching, and other issues must be considered.
The delay time of signals on the printed board is related to the characteristic impedance of the leads, which is also related to the dielectric constant of the printed circuit board material. It can be roughly considered that the transmission speed of signals on the printed board leads is between 1/3 and 1/2 of the speed of light. The standard delay time (Tr) of logic telephone elements commonly used in microcontroller systems is between 3 and 18ns.
On the printed circuit board, when a signal passes through a 7W resistor and a 25cm long lead, the delay time on the line is approximately between 4 and 20ns. This means that the shorter the lead on the printed circuit, the better; it should not exceed 25cm. Moreover, the number of vias should also be minimized, ideally no more than 2.
When the rise time of a signal is faster than the signal delay time, fast electronics processing should be applied. At this point, impedance matching for transmission lines must be considered. For signal transmission between integrated circuits on a printed circuit board, Td>Trd must be avoided, and the larger the printed circuit board, the slower the system speed should be.
The following conclusion summarizes a rule for printed circuit board design: the delay time of signals on the printed board should not exceed the nominal delay time of the devices used.
(3) Reduce crosstalk between signal lines:
A step signal at point A with a rise time of Tr is transmitted to point B through lead AB. The delay time of the signal on line AB is Td. At point D, due to the forward transmission of the signal from point A and the reflection of the signal after reaching point B, a pulse signal with a width of Tr will be induced after Td time on line AB. At point C, due to the signal transmission and reflection on line AB, a positive pulse signal will be induced with a width of twice the delay time of the signal on line AB, that is, 2Td. This is the crosstalk between signals.
The strength of the interference signal is related to the di/at of the signal at point C and the distance between lines. When the two signal lines are not very long, what is actually seen on line AB is the superposition of two pulses.
Microcontrollers manufactured using CMOS technology have high input impedance, high noise, and high noise tolerance. Digital circuits can superimpose 100~200mV noise without affecting their operation. If the line AB in the figure is an analog signal, this interference becomes intolerable. If the printed circuit board is a four-layer board, with one layer being a large area of ground, or if it is a double-sided board with the back of the signal line being a large area of ground, this crosstalk will be reduced.
The reason is that a large area of ground reduces the characteristic impedance of the signal line, greatly reducing the reflection of the signal at point D. The characteristic impedance is inversely proportional to the square of the dielectric constant of the medium between the signal line and ground and is directly proportional to the natural logarithm of the thickness of the medium.
If line AB is an analog signal, to avoid interference from digital circuit signal line CD on AB, there should be a large area of ground below line AB, and the distance between line AB and line CD should be greater than 2 to 3 times the distance from line AB to ground. Local shielding ground can be used, with ground wires laid on both sides of the leads with junctions.
(4) Reduce noise from the power supply:
The power supply introduces noise into the circuit while providing power. The reset line, interrupt line, and other control lines in the circuit are easily affected by external noise.
Strong interference on the power line enters the circuit, and even in battery-powered systems, the battery itself also has high-frequency noise. Analog signals in analog circuits are particularly susceptible to interference from the power supply.
(5) Pay attention to the high-frequency characteristics of printed lines and components:
In high-frequency situations, the distributed inductance and capacitance of leads, vias, resistors, capacitors, and connectors on the printed circuit board cannot be ignored. The distributed inductance of capacitors cannot be ignored, and the distributed capacitance of inductors cannot be ignored.
Resistors reflect high-frequency signals, and the distributed capacitance of leads has an effect. When the length exceeds 1/20 of the corresponding wavelength of the noise frequency, an antenna effect occurs, and noise is emitted through the leads.
The vias on the printed circuit board cause approximately 0.6pf of capacitance. The packaging material of an integrated circuit introduces 2~6pf of capacitance. A connector on a circuit board has a distributed inductance of 520nH. A dual in-line 24-pin integrated circuit socket introduces 4~18nH of distributed inductance.
These small distributed parameters can be ignored in microcontroller systems at lower frequencies; however, they must be given special attention in high-speed systems.
(6) Reasonable zoning of component layout:
The positions of components on the printed circuit board must fully consider anti-electromagnetic interference issues. One principle is to keep the leads between components as short as possible. In layout, the analog signal part, high-speed digital circuit part, and noise source part (such as relays, high-current switches, etc.) should be reasonably separated to minimize mutual signal coupling.
Properly handle grounding: Power and ground lines on the printed circuit board are crucial. The main means to overcome electromagnetic interference is grounding.
For double-sided boards, grounding layout is particularly important. By using a single-point grounding method, the power and ground are connected to the printed circuit board from both ends of the power supply, with one contact for power and one for ground. There should be multiple return ground wires on the printed circuit board, all converging at the return point to the power supply, known as single-point grounding.
The so-called separation of analog ground, digital ground, and high-power device ground refers to separating the wiring while converging at this grounding point. When connecting with signals outside the printed circuit board, shielded cables are usually used. For high-frequency and digital signals, both ends of the shielded cable should be grounded. For low-frequency analog signals, grounding one end of the shielded cable is preferable.
Circuitry that is particularly sensitive to noise and interference or circuits with severe high-frequency noise should be shielded with metal covers.
(7) Proper use of decoupling capacitors:
Good high-frequency decoupling capacitors can eliminate high-frequency components up to 1GHz. Ceramic chip capacitors or multilayer ceramic capacitors have good high-frequency characteristics. When designing printed circuit boards, a decoupling capacitor should be added between the power and ground of each integrated circuit.
Decoupling capacitors serve two functions: on one hand, they act as energy storage capacitors for the integrated circuit, providing and absorbing the charging and discharging energy during the switching of the integrated circuit; on the other hand, they bypass the high-frequency noise of the device.
The typical decoupling capacitor in digital circuits is a 0.1uF decoupling capacitor with 5nH of distributed inductance, and its parallel resonant frequency is about 7MHz. This means it has good decoupling effects for noise below 10MHz, but it is almost ineffective for noise above 40MHz.
1uF and 10uF capacitors have parallel resonant frequencies above 20MHz, which are better at removing high-frequency noise. It is often beneficial to have a 1uF or 10uF high-frequency capacitor at the point where power enters the printed board, even in battery-powered systems.
For every 10 integrated circuits, a charge-discharge capacitor, also known as a storage capacitor, should be added, with a recommended size of 10uF. Do not use electrolytic capacitors, as they are structured as two layers of film rolled up, which behave as inductors at high frequencies. Use tantalum capacitors or polyester capacitors instead.
The selection of decoupling capacitor values is not strict and can be calculated as C=1/f; for example, 0.1uF for 10MHz. For systems composed of microcontrollers, values between 0.1uF and 0.01uF can be used.
3. Some Experiences in Reducing Noise and Electromagnetic Interference
(1) Use low-speed chips if possible, and reserve high-speed chips for critical areas.
(2) Use a resistor in series to reduce the rise and fall rates of control circuits.
(3) Provide some form of damping for relays and other devices.
(4) Use clocks that meet system requirements for frequency.
(5) Place clock generators as close as possible to the devices using that clock. The quartz crystal oscillator housing should be grounded.
(6) Enclose the clock area with ground wires, keeping the clock lines as short as possible.
(7) Place I/O driver circuits as close as possible to the edge of the printed board to quickly exit the board. Add filtering to signals entering the printed board, and filter signals coming from high-noise areas, using series termination resistors to reduce signal reflection.
(8) Unused MCD terminals should be connected to high or ground, or defined as output terminals. All terminals that should connect to power ground on the integrated circuit must be connected and not left floating.
(9) Do not leave unused logic gate inputs floating; connect unused op-amp positive inputs to ground and negative inputs to output.
(10) Use 45-degree bends for wiring on the printed board instead of 90-degree bends to reduce high-frequency signal emissions and coupling.
(11) Zone the printed board according to frequency and current switching characteristics, keeping noise-generating components away from non-noise components.
(12) Use single-point power and ground connections for single-sided and double-sided boards, and keep power lines and ground lines as thick as possible. If financially feasible, use multilayer boards to reduce the parasitic inductance of power and ground.
(13) Keep clock, bus, and chip select signals away from I/O lines and connectors.
(14) Keep analog voltage input lines and reference voltage terminals as far away from digital circuit signal lines, especially clocks, as possible.
(15) For A/D type devices, the digital and analog sections should be unified rather than crossed.
(16) Clock lines should be perpendicular to I/O lines to reduce interference compared to parallel I/O lines, and the pins of clock components should be kept away from I/O cables.
(17) Keep component leads as short as possible, and keep decoupling capacitor leads as short as possible.
(18) Critical lines should be as thick as possible and have ground protection on both sides. High-speed lines should be short and straight.
(19) Sensitive lines should not run parallel to high-current or high-speed switching lines.
(20) Do not route lines under quartz crystals and devices sensitive to noise.
(21) Weak signal circuits and low-frequency circuits should not form current loops.
(22) No signal should form loops; if unavoidable, keep the loop area as small as possible.
(23) Each integrated circuit should have a decoupling capacitor. A small high-frequency bypass capacitor should be added next to each electrolytic capacitor.
(24) Use large-capacity tantalum or polyester capacitors instead of electrolytic capacitors as energy storage capacitors. When using tubular capacitors, the housing should be grounded.
Source: Electronic Engineer’s Notes
Copyright Notice: This article is copyrighted by the original author and does not represent the views of the association. Articles promoted by the “Jiangxi Electronic Circuit Industry Association” are for sharing purposes only and do not represent the stance of this account. If there are copyright issues, please contact us for deletion.
