On August 24, Imagination announced its financial performance for the first half of 2021, showing a 55% year-on-year revenue growth, indicating a potential recovery. The report noted that the company’s revenue for the first half of the year was $76 million, compared to $49 million in the same period of 2020.
Imagination stated that in the first half of the year, it signed licensing agreements with over 35 partners in sectors such as automotive, data centers, desktops, mobile, and DTV. Imagination holds a 37% share in the smartphone graphics processing unit (GPU) market (source: TSR) and is the largest GPU supplier in the automotive industry, with approximately 45% market share.
In its strategic assessment in Q4 2020, Imagination identified the data center and desktop market as a significant opportunity, leveraging the high performance of its A-series and B-series GPU products to gain substantial traction in this higher-performance GPU space, resulting in considerable revenue and customer growth in these segments. The company expects to launch more products in its GPU family, the C series, in Q4 2021 to maintain a rapid pace of technological development and releases.
In the automotive sector, the transition to EVs (electric vehicles), especially in China, is creating strong growth opportunities for Imagination, which is already a leader in HMI (human-machine interface) GPU solutions. The company has also entered the autonomous vehicle segment with its GPU and AI technologies. Additionally, the demand for connecting complex automotive systems has enabled the company to introduce new EPP (Ethernet Packet Processor) products to the market.
Supported by these achievements, Imagination announced its next steps to expand its influence and double down on market success: the development and launch of a RISC-V CPU series, which will cater to the independent CPU market as well as the heterogeneous computing field.
Imagination stated that it is re-entering the CPU market with designs based on the RISC-V open ISA. The company’s tradition in CPUs allows it to provide innovative and patented technologies for the discrete CPU market and meet the demand for heterogeneous solutions that combine GPUs, CPUs, and AI processors. This strategy will facilitate further growth.
RISC-V is an open instruction set architecture (ISA) managed by the RISC-V Foundation, a non-profit organization established in 2015. Initially composed of a team of 29, it has since achieved significant success. The foundation’s membership has now grown to over 2,000, all built on the same architecture—modularity being one of the key aspects. Unlike Arm, RISC-V does not require licensing fees, which is a key reason for its rapid growth since its launch. However, it should not be assumed that it is an unstandardized, cost-cutting architecture simply because it is open-source; after years of development, this open architecture has made significant breakthroughs in supercomputing and machine learning markets.
RISC-V is Becoming Ubiquitous
Calista Redmond, CEO of the RISC-V International microprocessor alliance, is a fan of the wild era of chip competition in the 1980s.
“Since the 1980s, this is the biggest opportunity to change the computing and hardware market that history has seen, and it excites me every day,” Redmond said in a recent interview with ZDNet.
She refers to the flourishing of numerous different computer chip architectures in the 1980s, including Intel’s x86 processors, IBM’s POWER architecture, MIPS-based processors produced by companies like NEC and Toshiba, Digital Equipment Corp.’s Alpha series processors, Sun’s Sparc processors, Motorola’s PowerPC series, and HP’s PA-RISC series, to name a few of the more well-known chips; the chip industry at that time was truly vibrant.
However, decades later, many of these processor families have disappeared, leaving two main processor camps: the x86 dominated by Intel and AMD, and ARM, owned by Japan’s SoftBank Group, which is being sold to Nvidia.
RISC-V, born a decade ago in a lab at the University of California, Berkeley, is the academic achievement of Professors David Patterson and Krste Asanović. This new architecture can be likened to Linux in the chip world, as its instruction set can be used by all chip manufacturers and can be freely modified—“similar to an open hardware kernel, just as Linux is an open software kernel,” Redmond said.
RISC-V is not only steadily gaining industry support but is also beginning to lead technological breakthroughs.
One of RISC-V’s early supporters, the IP startup SiFive, is collaborating with Intel to manufacture RISC-V-based chips in Intel’s new foundry project.
Some chip executives have indicated that Nvidia’s acquisition of ARM may prompt companies to consider RISC-V. “This is a great thing for RISC-V,” said Victor Peng, CEO of Xilinx, in a previous interview.
For Redmond, this presents another opportunity for computing diversity that was cut short in the 1980s.
“Many processors are vying to become the core and soul of computing,” Redmond said.
However, “whether in the early personal computers or mobile phones, everything adopted proprietary approaches; the open efforts that were just starting at that time did not have all the elements for success.”
“
As we move forward from here, this is a significant shift and change in computer history.”
“We are seeing massive, large-scale investments.”
Redmond, with her extensive hardware experience and ability to build bridges among various parties, has taken on the role of running the RISC-V alliance.
After nearly 13 years at IBM, she joined the organization about three years ago. While working at the blue giant, she was responsible for managing the ecosystem of the Z series mainframe business and served as president of the OpenPOWER Foundation, which was established in 2013 to develop an ecosystem for POWER chips. Redmond also served on the board of the Open Mainframe Project for over two years, an organization founded in 2015 to bring Linux to mainframes.
In other words, she is well-versed in how alliances are formed and nurtured.
Redmond said, “My ship is tight, part of it is membership, part of it is increasing our membership.” “We have a large number of sign-ups, from students to entrepreneurs, startups to multinational corporations.” Membership has doubled in the past year to over 2,000. “This is the traction we continue to cultivate across the community.”
Redmond’s passion for changing computing is matched by RISC-V’s CTO Mark Himelstein. “We are at a turning point,” Himelstein told ZDNet in an interview. “Due to the resurgence of integrated designs like IoT and SoCs, hundreds of millions of cores will be launched this year.”
“Even if someone has only one chip on board, they may have ten RISC-V chips for specific purposes,” Himelstein said. He noted that the ability to acquire intellectual property from the ever-expanding ecosystem greatly enhances the flexibility of RISC-V chips, rather than just being a no-licensing arrangement.
“Our motto is, do not replicate, innovate,” Himelstein said, referring to the potential for a common feature set that can become universal for all RISC-V users.
“We are making tracks and focusing on what the community deems important,” Himelstein said. “We have significantly expanded our software work,” with fifteen working groups, he said.
Redmond stated that this includes a series of continuously expanding contributions to software beyond the RISC-V instruction set specification itself. “As we expand from foundational hardware elements and tools and design resources to software and other aspects of the ecosystem, this is also a sign of success,” including “cross-industry operating systems, specific applications, and workloads.”
The rise of open source is helping the development of this software ecosystem.
“We already have operating systems that are proficient in running on multiple architectures,” she pointed out. “Canonical, Ubuntu, and SuSE have already invested in multiple architectures, and RISC-V is a clear choice. They also want to be involved.”
Redmond sees this as progress, not only in the increase of development volume but also in the growing complexity of parts. “This is the size of the core,” she observed. “RISC-V started in academia but quickly shifted to embedded and other small, simple, low-power designs.”
“The interesting event now is that we see RISC-V surging in all types of computing, not limited to that corner, but actually evolving into multi-core, the largest systems, the largest chips, and a diversity of horizontal scaling, encompassing everything from embedded to enterprise, including workloads that even proprietary architectures find difficult to surpass.”
“From soldering irons to supercomputers, RISC-V is everywhere,” Himelstein added.
This pathway from soldering irons to supercomputers is happening because Redmond is building a consortium to protect and nurture the instruction set, which has no commercial ambitions of its own.
Regarding Nvidia and its acquisition of ARM, Redmond pointed out that Nvidia is a “long-time supporter of RISC-V” and expressed its “strategic intent to continue using RISC-V.”
“An interesting angle is that sometimes RISC-V can be both,” she reflected. “In some cases, the same chip can have both RISC-V and other architectures simultaneously.” Himelstein agreed, noting that “many people are multi-denominational.”
Some of RISC-V’s progress is hard to see because, no matter how successful RISC-V proves to be, the world may never know the full extent of its usage. This is because, while ARM and other commercial technology providers require their licensees to sign documents, those using RISC-V are not obligated to disclose their usage.
RISC-V International encourages vendors to voluntarily disclose their usage but does not mandate disclosure.
When asked if measuring RISC-V’s progress is mysterious, Redmond replied, “That’s somewhat fair: unfortunately, we cannot show everyone the roadmap of their chip designs using the instruction set plan.”
She pointed to some publicly known facts, such as the European Processor Initiative, which aims to “adopt an open computing approach,” and RISC-V is “very happy to be involved,” she said. “In the Asia-Pacific region, you will see a lot of activity happening, from handheld devices to automobiles,” she directly observed the automotive supply chain, especially in Japan.
She noted that Pakistan has “declared RISC-V as their national [chip] architecture,” while India has a RISC-V-based Shakti chip project. In North America, “many multinational companies are incorporating RISC-V as part of their overall chip strategy,” she said, including Nvidia and Google.
Clearly, the open instruction set can greatly benefit cloud computing companies like Google and Amazon.
RISC-V’s co-inventor Patterson has served as an advisor within Google for many years, responsible for developing TPUs for machine learning. Alibaba is the only publicly disclosed cloud company using RISC-V.
When asked if other cloud companies are developing RISC-V, Redmond did not disclose much. “I’m sorry,” she laughed.
In Redmond’s view, RISC-V’s steady development is because the alliance she is helping to build means that the pace of ecosystem development can be much faster than that of Intel or ARM.
“Back in the 1980s, there were many processor wars, and this adjustment was mainly aimed at Intel and later ARM, both of which took decades to cultivate this ecosystem,” Redmond reflected.
“This is also a challenge for RISC-V, but I can assure you that we do not need to spend decades enabling this ecosystem or solving compatibility and portability issues.”
“If you haven’t seen solutions yet, that’s what we are working on.”
Source: Semiconductor Industry Observation
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