Smartphones integrate various devices. To form a unified industry standard, the MIPI Alliance initiated MIPI (Mobile Industry Processor Interface) as an open standard for mobile application processors. So how do we analyze the display module interface protocol MIPI-DSI in MIPI?
1. Introduction to MIPI
MIPI was established in 2003 by companies such as ARM, Nokia, ST, and IT, aiming to standardize the interfaces inside mobile phones, such as storage interfaces, display interfaces, RF/baseband interfaces, etc., to reduce compatibility issues and simplify design.
The MIPI Alliance has different working groups that define a series of internal interface standards for mobile phones, such as Camera Serial Interface (CSI), Display Serial Interface (DSI), and DigRF for RF interfaces. The benefit of a unified interface standard is that mobile manufacturers can flexibly choose different chips and modules from the market as needed, making it easy and quick to design appearance and functionality.
Figure 1 MIPI Alliance
The MIPI structure shown in Figure 2 consists of physical layer, protocol layer, and application layer. Currently, mature MIPI applications include Camera CSI interface, Display DSI interface, and DigRF interface between baseband and RF, while other specifications such as UFS and LLI are gradually being formulated and improved.
Figure 2 MIPI Interface Structure
2. MIPI-DSI
MIPI-DSI is a sub-protocol of MIPI, formulated by the Display working group, regarding the standard specification for display module interfaces. MIPI-DSI uses D-PHY as the physical layer for transmission.
D-PHY uses 1 pair of source-synchronous differential clocks and 1 to 4 pairs of differential data lines for data transmission. Data transmission is done using DDR (Double Data Rate) method, meaning data is transmitted on both the rising and falling edges of the clock.
1. D-PHY Transmission States: Low Power (LP) and High Speed (HS).
LP (Single Signal 0V~1.2V): Low power mode, with a transmission speed of 10Mbps, used mainly for transmitting control commands.
HS (Differential Signal 100mv~300mv): High-speed mode, with a transmission speed of 80M~1Gbps, used for transmitting high-speed image data.
HS differential and LP single signals are shown in Figure 3.
Figure 3 Single-ended and Differential Signals
2. Three Modes of D-PHY: Control Mode, Escape Mode, and High-Speed Mode (HS Mode)
The first two modes belong to the LP state, while the high-speed mode belongs to the HS state. The Escape Mode is defined as a special operating mode under the LP state.
Figure 4 MIPI DSI Application
MIPI-DSI uses single-ended and differential signal lines for data transmission, utilizing single-ended data transmission in LP mode and differential data transmission in HS mode, configured using the bidirectional Data0+/Data0- data lanes.
3. MIPI-DSI Data Transmission Format
The data transmission format of MIPI-DSI is based on data packets, which are classified into short packets and long packets.
1. Short Packet: 4 bytes (fixed length), mainly used for transmitting commands and reading/writing registers;
Packet Header:
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Data Identifier (DI) *1 byte: contains virtual data channel [7:6] and data type [5:0].
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Packet *2 bytes: the data to be sent, fixed length of two bytes.
-
Error Correction Code (ECC) *1 byte: can correct one bit error.
Figure 5 Structure of Short Packet
2. Long Packet: 6~65541 bytes (dynamic length) mainly used for transmitting large amounts of image data or some control commands.
Packet Header (4 bytes):
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Data Identifier (DI) *1 byte: contains virtual data channel [7:6] and data type [5:0].
-
Byte Count (WC) *2 bytes: the data to be sent, fixed length of two bytes.
-
Error Correction Code (ECC) *1 byte: can correct one bit error.
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Effective Data Transmission (6~65541 bytes): max bytes = 2^16.
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Packet Footer (2 bytes): checksum.
Figure 6 Structure of Long Packet
4. Practical Applications and Analysis
1. Simulate MIPI-DSI protocol on-site using the latest “data mining type” oscilloscope ZDS4054 Plus, which comes with free MIPI-DSI protocol low-speed LP mode decoding function. The specific operation is shown in Figure 7.
Figure 7 Decoding Steps
2. The ZDS4054 Plus has a standard storage depth of 512Mpts and can decode full memory data. The MIPI-DSI protocol decoding interface is shown in Figure 8. You can view the specific decoding content through the event table and also export the content from the event table in report format.
Figure 8 Decoding Interface
3. When analyzing data anomalies over a long period, you can use the dual ZOOM multi-window display function in the oscilloscope’s zoom mode to monitor and analyze signals across multiple windows, allowing you to analyze a specific data frame or data point by examining the enlarged data details to identify anomalies, as shown in Figure 9.
Figure 9 Detail Analysis
5. Conclusion
The ZDS4054 Plus oscilloscope is equipped with free MIPI-DSI protocol, providing full storage depth decoding for low-speed LP mode of the protocol, and can quickly locate anomalies through various search methods for detailed analysis.
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