How Many Types of Buses Are There? Why Do Engineers Often Get Confused?

First, it should be understood what a bus is. According to Baidu’s complete definition: a bus is a common communication line for transmitting information between various functional components of a computer, composed of wire transmission lines, classified according to the types of information transmitted by the computer.

In fact, a bus is an internal structure that serves as a common channel for information transmission between the CPU, memory, input, and output devices.

Engineers often use a set of lines, configured with appropriate interface circuits, to connect various components and peripheral devices, simplifying hardware circuit design and system structure. This shared connection line is called a bus. Additionally, using a bus structure facilitates the expansion of components and devices, especially when a unified bus standard is established, making interconnection between different devices easier.

Bus Classification:

1. Buses can be classified into five major types based on function and specification:

Data bus, address bus, control bus, expansion bus, and local bus.

The data bus, address bus, and control bus are collectively referred to as the system bus, which is what is commonly meant by bus. Common data buses include ISA, EISA, VESA, PCI, etc.

Address Bus: It is specifically used to transmit addresses. Since addresses can only be sent from the CPU to external memory or I/O ports, the address bus is always unidirectional and three-state, differing from the data bus. The number of bits in the address bus determines the size of the memory space that the CPU can directly address.

Control Bus: Used to transmit control signals and timing signals. Some control signals are sent from the microprocessor to memory and I/O interface circuits; others are feedback from other components to the CPU, such as interrupt request signals, reset signals, bus request signals, device ready signals, etc.

2. Classified by the method of data transmission:

Can be divided into serial buses and parallel buses.

In a serial bus, binary data is sent bit by bit through a single data line to the destination device.

Parallel buses usually have more than two data lines. Common serial buses include SPI, I2C, USB, and RS232.

3. Classified by whether the clock signal is independent:

Can be divided into synchronous and asynchronous buses.

The clock signal of a synchronous bus is independent of the data, while that of an asynchronous bus is derived from the data.

SPI and I2C are synchronous serial buses, while RS232 uses an asynchronous serial bus.

4. In microcomputers, buses generally include internal buses, system buses, and external buses:

The internal bus connects peripheral chips within the microcomputer to the processor for inter-chip communication.

The system bus connects various plug-in boards to the system board for inter-plug-in communication.

The external bus connects the microcomputer to external devices, allowing the microcomputer to exchange information and data with other devices through this bus, facilitating inter-device communication.

With so many classifications, today we will first discuss internal buses, system buses, and external buses.

Internal Bus

I2C Bus:

The I2C (Inter-IC) bus was introduced by Philips over ten years ago and has become a widely adopted new bus standard in the field of microelectronic communication control.

It is a special form of synchronous communication, characterized by fewer interface lines, simplified control methods, small device packaging, and relatively high communication speeds.

In master-slave communication, multiple I2C bus devices can be connected to the I2C bus simultaneously, identified by their addresses.

SCI Bus:

The Serial Communication Interface (SCI) was also introduced by Motorola. It is a general asynchronous communication interface (UART), similar to the asynchronous communication function of MCS-51.

IIS:

I2S (Inter-IC Sound Bus) is a bus standard developed by Philips for audio data transmission between digital audio devices.

I2S has three main signals:

Serial Clock SCLK, also called bit clock, corresponds to each bit of digital audio data, with one pulse per SCLK.
Frame Clock LRCK, used to switch between left and right channel data. LRCK of “1” indicates that left channel data is being transmitted, while “0” indicates right channel data.
Serial Data SDATA, which represents audio data in binary complement form.

Sometimes, to improve synchronization between systems, an additional signal called MCLK, or master clock (Sys Clock), may also need to be transmitted.

SPI:

SPI (Serial Peripheral Interface) was first defined by Motorola for its MC68HCXX series processors.

SPI interfaces are mainly used between EEPROM, FLASH, real-time clocks, AD converters, as well as digital signal processors and digital signal decoders.

SPI operates in a master-slave mode, typically involving one master device and one or more slave devices, with the following four signal interfaces:

MOSI – Master Out Slave In
MISO – Master In Slave Out
SCLK – Clock signal generated by the master device
/SS – Slave Select signal controlled by the master device

UART:

UART (Universal Asynchronous Receiver Transmitter) converts parallel data sent from within the computer into an output serial data stream.

It converts incoming serial data from outside the computer into bytes for use by devices within the computer that use parallel data. It adds parity bits to the output serial data stream and performs parity checks on the received data stream.

It includes start and stop markers in the output data stream and removes them from the incoming data stream. It also handles interrupt signals generated by input devices like keyboards or mice (which are also serial devices).

It can manage synchronization issues between the computer and external serial devices. Some high-end UARTs also provide input and output data buffers. Common signals include TXD, RXD, /RTS, and /CTS.

JTAG:

JTAG (Joint Test Action Group) is an international standard testing protocol (IEEE 1149.1 compliant), mainly used for internal chip testing.

The standard JTAG interface consists of four lines: TMS, TCK, TDI, TDO, which are mode select, clock, data input, and data output lines, respectively.

The Test Reset signal (TRST, usually active low) is generally an optional fifth port signal. A CPU with a JTAG Debug interface module can access the internal registers of the CPU and devices connected to the CPU bus, such as FLASH, RAM, and registers of built-in modules like UART, Timers, GPIO, etc., as long as the clock is functioning properly.

CAN:

CAN stands for “Controller Area Network,” which is one of the most widely used field buses internationally.

Initially, CAN was designed for microcontroller communication in automotive environments, exchanging information between various electronic control units (ECUs) within a vehicle, forming an automotive electronic control network.

For example, engine management systems, transmission controllers, instrumentation, and electronic backbone systems all embed CAN control devices. In a single network constructed with CAN bus, theoretically, countless nodes can be connected.

In practical applications, the number of nodes is limited by the electrical characteristics of the network hardware.

For instance, when using the Philips P82C250 as a CAN transceiver, a maximum of 110 nodes can be connected to the same network. CAN can provide data transmission rates of up to 1Mbit/s, making real-time control very easy.

Moreover, the hardware’s error-checking characteristics enhance CAN’s ability to resist electromagnetic interference.

SDIO:

SDIO is an extension interface of the SD type, which can connect not only SD cards but also devices that support the SDIO interface; the socket’s use is not limited to storage cards.

Devices supporting the SDIO interface, such as PDAs and laptops, can connect to devices like GPS receivers, Wi-Fi or Bluetooth adapters, modems, LAN adapters, barcode readers, FM radios, TV receivers, RFID readers, or cameras that use the SD standard interface.

GPIO:

GPIO (General Purpose Input Output) or bus extenders simplify the expansion of I/O ports using industry-standard I²C, SMBus™, or SPI™ interfaces.

When a microcontroller or chipset lacks sufficient I/O ports, or when the system requires remote serial communication or control, GPIO products can provide additional control and monitoring functionality.

System Bus

ISA Bus:

ISA (Industrial Standard Architecture) bus standard was established by IBM in 1984 for the launch of the PC/AT, hence also called the AT bus.

It is an extension of the XT bus, designed to meet 8/16-bit data bus requirements. It was widely used during the 80286 to 80486 era, to the extent that ISA bus slots are still retained in modern Pentium machines. The ISA bus has 98 pins.

EISA Bus:

The EISA bus was jointly launched in 1988 by Compaq and eight other companies.

It uses dual-layer sockets based on the ISA bus, adding 98 signal lines to the original 98 ISA signal lines, essentially adding one EISA signal line between every two ISA signal lines.

In practice, the EISA bus is fully compatible with ISA bus signals.

VESA Bus:

The VESA (Video Electronics Standards Association) bus was launched in 1992 by 60 accessory card manufacturers, also known as the VL (VESA Local Bus).

Its introduction laid the foundation for the innovation of microcomputer system bus architecture. This bus system considers the direct connection between the CPU and main memory and cache, typically referring to this part of the bus as the CPU bus or main bus, while other devices connect to the CPU bus via the VL bus, hence the VL bus is referred to as a local bus.

It defines a 32-bit data line, which can be expanded to 64 bits, using a 33MHz clock frequency, with a maximum transfer rate of 132MB/s, capable of synchronous operation with the CPU. It is a high-speed, efficient local bus that supports 386SX, 386DX, 486SX, 486DX, and Pentium microprocessors.

PCI Bus:

The PCI (Peripheral Component Interconnect) bus is currently one of the most popular buses, introduced by Intel as a local bus. It defines a 32-bit data bus, which can be expanded to 64 bits.

The PCI bus motherboard slot is smaller than the original ISA bus slot, with vastly improved functionality compared to VESA and ISA, supporting burst read/write operations, with a maximum transfer rate of 132MB/s, and capable of supporting multiple peripheral devices simultaneously.

The PCI local bus is not compatible with existing ISA, EISA, or MCA (Micro Channel Architecture) buses, but it is not restricted by the processor and has evolved based on new-generation processors like Pentium.

External Bus

RS-232-C Bus:

RS-232-C is a serial physical interface standard established by the Electronic Industries Association (EIA) in the United States. RS stands for “Recommended Standard,” 232 is the identification number, and C indicates the revision number.

The RS-232-C bus standard has 25 signal lines, including a main channel and an auxiliary channel. In most cases, the main channel is primarily used; for general duplex communication, only a few signal lines are needed, such as one sending line, one receiving line, and one ground line. The RS-232-C standard specifies data transmission rates of 50, 75, 100, 150, 300, 600, 1200, 2400, 4800, 9600, 19200 baud.

The RS-232-C standard allows drivers to have a capacitive load of 2500pF, which limits communication distance. For example, using a 150pF/m communication cable, the maximum communication distance is 15m; if the cable’s capacitance per meter is reduced, the communication distance can be increased.

Another reason for the short transmission distance is that RS-232 uses single-ended signal transmission, which suffers from common ground noise and cannot suppress common-mode interference, thus generally used for communications within 20m.

RS-485 Bus:

When communication distances range from tens to thousands of meters, the RS-485 serial bus standard is widely adopted. RS-485 employs balanced sending and differential receiving, providing the ability to suppress common-mode interference.

Additionally, the bus transceiver has high sensitivity, capable of detecting voltage as low as 200mV, allowing the transmission signal to be recovered from kilometers away.

RS-485 operates in half-duplex mode, meaning that only one point can be in the sending state at any time, thus the sending circuit must be controlled by an enable signal.

RS-485 is very convenient for multipoint interconnections, allowing for the elimination of many signal lines. Using RS-485 can form a distributed system, allowing for a maximum of 32 drivers and 32 receivers to be connected in parallel.

IEEE-488 Bus:

The IEEE-488 bus is used to connect systems, such as microcomputers, digital voltmeters, digital displays, and other instruments can be assembled using the IEEE-488 bus.

It transmits signals in a bit-parallel, byte-serial, bidirectional asynchronous manner, with a bus connection method, allowing instruments to be directly connected to the bus without intermediary units, but a maximum of 15 devices can be connected to the bus. The maximum transmission distance is 20 meters, with a typical signal transmission speed of 500KB/s and a maximum transmission speed of 1MB/s.

USB Bus:

The Universal Serial Bus (USB) was jointly launched by seven world-renowned computer and communication companies, including Intel, Compaq, Digital, IBM, Microsoft, NEC, and Northern Telecom, as a new interface standard.

It is based on universal connection technology, enabling simple and fast connections for peripherals, achieving the goal of convenience for users, reducing costs, and expanding the range of PC peripheral connections. It can provide power for peripherals, unlike ordinary devices that use serial or parallel ports which require separate power systems.

Moreover, with the recent boom in automotive electronics, let’s talk about the LIN and CAN buses in automotive networks:

As early as 1983, Bosch began developing the Controller Area Network (CAN) bus, officially releasing related protocols in 1986. Currently, there are various automotive bus standards, but CAN remains the most popular standard.

In a CAN network, all nodes (originating from different ECUs) act as master nodes (i.e., there is no master-slave topology), and no specific addresses are assigned. Instead, messages carry identifiers.

At any given time, multiple nodes can send data to the CAN bus simultaneously. The message identifier helps determine the priority of the messages.

The highest priority message will cause the CAN bus to enter a dominant state, and all other nodes will stop sending. These nodes are essentially transceivers, capable of not only sending messages but also retrieving specific messages from the bus based on their functions. Thus, information flows between different nodes connected by the CAN bus.

Due to various error checks, including fill errors, bit errors, checksum errors, frame errors, and acknowledgment errors, CAN offers high reliability. CAN supports data transmission rates of up to 1Mbps, making it the default choice for connecting critical automotive functions ECUs (such as transmissions, temperature sensors, etc.).

But why do cars choose LIN?

The role of automotive electronics is not limited to these critical units. The body electronics market has been growing for years. Typical body control applications include seats, windows, intelligent wipers, and automotive air conditioning sensors.

The key requirement for body electronics is to ensure that cars are more comfortable and safer. Although these systems may not require the high reliability of critical ECUs, they still need a certain automotive network communication standard.

Comparison of LIN and CAN

Implementing CAN is more expensive than implementing LIN. Factors contributing to the higher cost of CAN include:

Each node in a CAN network requires a clock generator or crystal;
The chip-level implementation of CAN is more complex;
Uses dual-wire transmission.

Most importantly, the entire expensive architecture is overly extravagant for applications that do not require high reliability and high data rates.

The above is a comprehensive overview of various types of buses, hoping to provide some help to engineers.

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