This is a very basic article translated from PCB Hero.
There is also a comparative article about these three buses that you can refer to: https://www.totalphase.com/blog/2021/12/i2c-vs-spi-vs-uart-introduction-and-comparison-similarities-differences/
Differences Between I2C, SPI, and UART and Their Layout Guidelines
MCUs from 8-bit to 32-bit will use at least one of these protocols along with GPIO to achieve programmability and send signals to simple peripherals. These three serial protocols are bus protocols; I2C and UART use addressing schemes, while SPI is address-less. Although SPI is address-less, it is a bus protocol that can still be used to select downstream devices for data transmission.
I2C Protocol Routing and Layout Guidelines
I2C (pronounced I-squared C, sometimes also called Inter-Integrated Circuit IIC) uses two lines (standard, fast, and fast-mode plus) to control other devices; one line is the clock line (SCL), and the other is the data line (SDA). It has three modes, summarized in the table below. Note that the rise/fall time values assume typical series resistors are installed at the I/O.
|
Mode |
Data Rate/Clock Speed |
Max Rise/Fall Time |
Min Rise/Fall Time |
Direction |
|
Standard |
100kHz |
1000ns |
– |
Bidirectional |
|
Fast |
400kHz |
300ns |
20ns* |
Bidirectional |
|
Faster |
1MHz |
300ns |
20ns* |
Bidirectional |
|
High Speed |
3.4 MHz (100 pF bus) 1.7 MHz (400 pF bus) |
120 ns**240 ns** |
15 ns**30 ns** |
Bidirectional |
|
Ultra High Speed |
5MHz |
50ns |
25ns |
Unidirectional |
*Assuming VDD/VCC = 5.5 V. If VDD/VCC is lower, scale down proportionally. **For the clock line, divide these values by 2.
Note that the ultra-high-speed mode is the only mode where communication is only for downstream write operations. This mode is also important because it helps us understand when we need to match bus impedance, which in practice, is rarely required. If we take a very conservative 10% limit on critical line lengths, we find that the critical length of these lines is 0.32 m, which is much longer than most boards using I2C. If we use the corner frequency as the minimum rise/fall time and the critical length limit is 10%, we get even longer values of 0.92m. For ultra-high-speed mode, we should take more conservative figures of 0.32m; any I2C line shorter than this will not act as a transmission line, and we only need to worry about termination schemes.
The key to termination is to choose the correct pull-up resistor and series resistor. The pull-up resistor and the capacitance of the VDD/VCC line form a discharging and charging RC circuit, which provides signals to the receiver when the driver switches. The pull-up resistor values (Rp) for the signal line and clock line must follow the inequality below:
Note that the numbers in the denominator above are defined for transition times of 30% to 70%, which is standard in the I2C specification. To obtain 10%-90% transition times, replace 0.8473 with 2.2. This will further limit the values of the pull-up resistors.
The bus capacitance is determined using the standard formula for the bus impedance of VCC, and the bus capacitance can be calculated using the same formulas as for transmission lines (microstrip or stripline). You can then solve for bus capacitance using the line’s impedance and propagation delay. If you are not in the mood for that calculation, you can find an I2C bus capacitance calculator online. Finally, according to the I2C standard, series resistors are optional, although they can be used to protect devices from voltage spikes and slow down rise/fall times.
The SPI protocol is similar to I2C. This bus uses a total of 4 wires, and components can be arranged in two possible modes. If a single controller device is used to trigger a single downstream device, the topology is a simple point-to-point. Triggering multiple devices depends on the number of chip select outputs provided by the driver (standard mode). The second mode uses a daisy chain, where a single device select output continuously triggers each device in the daisy chain.
In the example above, our controller has two chip select outputs for triggering peripherals to receive and accept data from the host. When the controller outputs serial data, the required peripherals also need to be activated by the controller during the data frame so that they can accept and read the data. This is programmed into the logic of the controller. For example, if using a microcontroller or FPGA as the controller, it will be implemented in the code of the device application.
Unlike I2C, the various signal parameters in SPI are highly configurable. The RC discharge method using the small capacitance shown above can control the output current and rise/fall times of the interface. SPI is a push-pull interface, and the power is not sourced through pull-up resistors. The rise time is determined by the external capacitance and the output impedance of the driver. The SPI specification on your host controller may specify a specific rise time for a specific total capacitance (possibly 50 or 100 pF) entering the bus. For example, on an SPI bus on a PIC32 MCU, a specified output transition time of 5 ns is given for 50 pF of external capacitance. Thus, if we drop to 10 pF, we expect the rise time to drop to 1 ns for a given output current and voltage level. In this case, you now have a length margin of 0.6 inches (rough estimate, with a very conservative 10% limit for unmatched lengths). Then, if the rise time of the line becomes very long in a short time, you can use a series resistor to terminate the driver’s low impedance output.
UART Protocol Routing and Layout Guidelines
The Universal Asynchronous Receiver-Transmitter (UART) protocol is similar to I2C and SPI. The maximum data rate for these interfaces is about 5 Mbps. UART devices are also easy to use, as there is no clock sent between devices; everything is asynchronous. Note that the internal (system) clock of each UART device must run at some multiple of the baud rate (i.e., each bit is sampled N times). Only two wires are used for communication between a single controller device and a single downstream device.
Note that the data format, signal levels, and baud rate of UART devices can be configured through external driver circuits. Whether you see high-speed signal behavior depends on whether you are using RS-232 or RS-485 signal levels for transmission. UART signals at RS-232 levels typically do not require termination, as the edge rates are slow. However, UART signals with RS-485 usually require termination resistors. Follow standard high-speed design guidelines to determine when termination is needed by looking at the transitions in transmission line behavior.
A typical termination method to reduce overshoot during overshoot events is to apply series termination. Note that UART may idle at either high or low levels and may require pull-up resistors to set the desired idle level; always check your component specifications before adding pull-up resistors.