On September 18, 2025, NVIDIA announced a $5 billion investment in Intel at a price of $23.28 per share, establishing a long-term strategic partnership between the two companies.
In the future, Intel is expected to produce x86 SoCs integrated with NVIDIA GPU chips, coupled together via NVLink to enhance performance. Intel’s custom x86 CPUs will be integrated into NVIDIA’s AI platform, providing x86 solutions in addition to ARM architecture.
Today’s focus is on the analysis of general-purpose computing chips.
Data Chart: Research Database
(Data compiled from public sources, industry research sharing, not for investment advice)
Overview of General-Purpose Computing Chips
Definition of General-Purpose Computing ChipsGeneral-purpose computing chips are semiconductor core devices with high flexibility, capable of executing various non-specific computing tasks through programming. They are not limited to a single function and can handle diverse tasks such as data computation, logical judgment, and instruction decoding. Typical representatives include CPUs, GPUs, and APUs.
Types of General-Purpose Computing Chips1) Central Processing Unit (CPU): The CPU is the dominant category of general-purpose computing chips, responsible for system instruction control, logical operations, and resource scheduling. Its performance directly determines the basic computing capability of devices. Based on instruction set architecture, CPUs can be divided into three main categories:x86 architecture CPUs are based on a complex instruction set, offering strong compatibility and outstanding single-thread performance. Representative products include Intel’s Core and Xeon series, widely used in PCs, data centers, and other scenarios.
ARM architecture CPUs use a reduced instruction set (RISC), offering significant energy efficiency advantages. Representative products include Qualcomm Snapdragon 8 Gen4, Apple A18 Pro, and Huawei Kirin 9000S, primarily used in smartphones and tablets.
RISC-V architecture CPUs are based on an open-source instruction set, offering customization advantages. Representative products include Alibaba T-head Xuantie 910 and SiFive U74-MC, rapidly penetrating the IoT and edge computing fields.
2) General-Purpose Graphics Processing Unit (GPGPU): GPGPU extends the parallel computing capabilities based on traditional graphics rendering functions through general computing interfaces. Its core feature is the integration of thousands of stream processors, excelling in massive data parallel computation, compensating for the CPU’s shortcomings in parallel computing power.
3) Accelerated Processing Unit (APU): An APU integrates CPU and GPU into a single chip through Chiplet or advanced packaging technology, aiming to balance general computing and graphics processing capabilities under limited power consumption. APUs have become the mainstream general computing solution in consumer electronics.AMD is the leading manufacturer in this field.
Technical Architecture of General-Purpose Computing Chips
1) Instruction Set Architecture: The instruction set architecture determines the efficiency of instruction execution and software compatibility. CISC architecture (such as x86) supports complex operations through a rich instruction set, reducing code size but increasing hardware design complexity; RISC architecture (such as ARM, RISC-V) uses a simplified instruction set, achieving high single-cycle execution efficiency and simpler hardware implementation.
2) Multi-Core Parallel Architecture: Multi-core parallelism is a key technology for enhancing the multi-tasking capability of general-purpose computing chips, achieved by integrating multiple physical cores for task parallel scheduling. Consumer-grade CPUs typically adopt a 2-16 core design, while server-grade CPUs can have up to 128 cores.
3) Heterogeneous Computing Architecture: Heterogeneous computing architecture achieves computational power division by integrating different types of computing units (CPU + GPU + dedicated accelerators). Heterogeneous architecture enhances overall energy efficiency through “complementary advantages” and has become an important development direction for general-purpose computing chips.
Applications of General-Purpose Computing Chips
1) Consumer Electronics
The largest application field for general-purpose computing chips, covering smartphones, PCs, wearable devices, etc. In the smartphone sector, ARM architecture CPUs (such as Qualcomm Snapdragon and Apple A series) can achieve AI photography, multi-task processing, and game rendering with a power consumption of 5-15W; in the PC sector, x86 architecture CPUs dominate the high-performance market, meeting heavy computing demands such as video editing and 3D modeling, paired with GPGPUs to achieve 4K ray tracing gaming experiences; wearable devices use low-power MCUs (such as Apple S9 SiP) to complete health monitoring and exercise data processing at 1-3W power consumption.
2) Data Centers
The demand for general-purpose computing chips focuses on high concurrency, high stability, and energy efficiency. Server CPUs adopt multi-core and large cache designs, with Intel Xeon and AMD EPYC series occupying over 80% market share; GPGPUs have become the core computing power for AI training, with NVIDIA H100/H200 achieving trillion-parameter model training through NVLink interconnection; APUs and low-power ARM CPUs are used in edge computing nodes, processing localized data computations at 50-100W power consumption.
3) Edge Computing and Embedded Systems
Require general-purpose computing chips to have low power consumption, small size, and high reliability. In the industrial control field, MCUs can achieve motor control and sensor data collection at 1-5W power consumption; in the smart automotive sector, heterogeneous SoCs (such as Tesla HW4.0) integrate CPUs, GPUs, and NPUs to support autonomous driving perception and cabin entertainment functions; IoT devices use RISC-V architecture CPUs (such as Alibaba T-head Xuantie 804) to complete data transmission and simple logic operations at milliwatt-level power consumption.
Competitive Landscape of General-Purpose Computing Chips
Currently, the general-purpose computing chip industry has formed a “three-pole, multiple strong” competitive landscape.
1) x86 Camp
Centered around Intel and AMD, Intel dominates the consumer PC and server markets (with a CPU market share of about 65%), while AMD has achieved a comeback with its Zen architecture, increasing its server CPU share to 30%.
2) ARM Camp
Composed of Qualcomm, Apple, Huawei, etc., Qualcomm dominates the mobile CPU market (with a share of over 40%), Apple’s M series chips have broken into the high-end PC market with their self-developed architecture, and Huawei’s Kirin chips hold an important position in the domestic smartphone sector.
3) RISC-V Camp
In a rapid growth phase, manufacturers like Alibaba T-head and SiFive are expanding in the IoT and edge computing fields, with giants like Google and NVIDIA joining to accelerate ecosystem development.
Additionally, NVIDIA has built an AI computing barrier through GPGPU technology, occupying 85% of the data center accelerator card market, forming cross-industry competition against traditional CPU manufacturers; TSMC and Samsung, as foundries, influence chip performance and cost through advanced process technologies, becoming important supporting forces in industry competition.
Development Trends of General-Purpose Computing Chips
Currently, general-purpose computing chips are evolving towards “advanced processes + heterogeneous integration + AI fusion”.
In terms of process technology, general-purpose computing chips are advancing towards 2nm and below; heterogeneous integration has become a key to breaking performance bottlenecks, enabling flexible combinations of chips with different processes through Chiplet technology and 3D packaging technology; additionally, AI functions will be deeply integrated into general chips, with CPUs integrating AI acceleration units and GPGPUs optimizing sparse computation and quantized inference, forming a “general computing power + dedicated acceleration” hybrid architecture to meet the diverse computing needs of the intelligent era.
Industry Chain of General-Purpose Computing Chips
The industry chain of general-purpose computing chips focuses on design, manufacturing, and packaging/testing as core processes.
The design phase focuses on general architectures such as CPUs and GPUs, achieving multi-scenario task compatibility through optimized instruction sets (such as x86, ARM) and heterogeneous computing logic. The manufacturing phase relies on wafer foundry models, using 5nm/3nm FinFET and 2nm processes to achieve transistor miniaturization through key steps like lithography and etching. The packaging/testing phase introduces Chiplet heterogeneous integration (such as 2.5D/3D packaging), CoWoS wafer-level packaging, and Co-Packaged Optics (CPO) technology to enhance inter-chip interconnection density and optoelectronic collaboration efficiency, while ensuring reliability through high-precision testing.
From the perspective of the computing power industry chain, computing power chips are core components in the upstream.
In the upstream of the computing power industry chain, CPU, GPU, and other computing power chips provide underlying computing capabilities, supporting hardware and software such as boards, operating systems, and servers; the midstream includes various ICT device manufacturing, transforming computing power into tradable services through virtualization and computing power orchestration; the downstream includes IDC and applications in various industries such as general computing, artificial intelligence, and healthcare.
Computing power chips are the foundation of the entire computing power industry, and their performance directly determines the level of computing power, driving upgrades in midstream service capabilities and expansions in downstream application scenarios.
Market Size of General-Purpose Computing Chips
According to data disclosed by the China Business Intelligence Network, the market size of CPUs in China is expected to be around 230 billion yuan in 2024, with an average annual compound growth rate of over 8% from 2020 to 2024. It is expected that by 2025, the market size of CPUs in China will approach 250 billion yuan, showing a steady growth trend in the industry.
(Data as of April 2025)
According to data from the Moores Threads prospectus, the global GPU market is showing a significant growth trend from 2020 to 2024, with an average annual compound growth rate of 62.4%. The global GPU market size is expected to exceed 1.5 trillion yuan by 2025 and reach 3.5 trillion yuan by 2029.
(Data as of July 2025)
The AI intelligent computing GPU market in China has shown significant growth in recent years. According to data from the Moores Threads prospectus, the market size is expected to approach 100 billion yuan in 2024 and is projected to exceed 1 trillion yuan by 2028.
(Data as of July 2025)
Introduction to General-Purpose Computing Chip Companies
International Computing Power Chip Companies
1) NVIDIA (USA): Leading in graphics processing technology, launching Blackwell architecture chips (such as GB300), supporting generative AI and embodied intelligence, providing supercomputing-level support for robots.
2) AMD (USA): The 3nm process CDNA 4 architecture Instinct MI350 series integrates 185 billion transistors, with 288GB HBM3e memory supporting efficient training of trillion-parameter large models.
3) Intel (USA): The 18A process Gaudi3 chip specializes in AI training, exploring brain-like computing through the Loihi neuromorphic architecture, enhancing complex pattern recognition capabilities.
4) ARM (UK): The Armv9 architecture Cortex-A320 and Ethos-U85 NPU build an edge AI platform, supporting local operation of billion-parameter models, promoting IoT intelligence.
5) Qualcomm (USA): The Hexagon NPU integrated into Snapdragon 8 Supreme Edition improves energy efficiency by 45%, supporting terminal-side multimodal generative AI, such as real-time translation and image generation.
Chinese Computing Power Chip Companies
1) Huawei HiSilicon (Shenzhen): The Ascend 910B adopts a 7nm process, achieving inference performance at 80% of international mainstream products, supporting thousand-card cluster training, covering AI, finance, healthcare, and other scenarios.
2) Cambricon (Beijing): The MLU370-X8 dual-core architecture supports full interconnection of multiple cards, with FP32 computing power of 32 TFlops, and multi-precision mixed computing suitable for training models like YOLOv3 and BERT.
3) Alibaba T-head (Hangzhou): The Yitian 710 adopts a 5nm process and Armv9 architecture, with a single chip of 128 cores at a frequency of 3.2GHz, exceeding the benchmark by 20% in SPECint performance, supporting Alibaba Cloud elastic computing, reducing data center PUE to below 1.1.
4) Loongson Technology (Beijing): The 3A6000 processor is based on the Loong architecture, achieving a domestically developed instruction set, with single-core performance comparable to Intel’s 10th generation Core, integrating vector computation units, and passing security and reliability level II certification, serving key scenarios such as the National Two Sessions.
5) Biren Technology (Shanghai): The BR100 general-purpose GPU adopts a 7nm process and Chiplet packaging, achieving three times the computing power of international flagship products, supporting PCIe 5.0 and 448GB/s high-speed interconnection, empowering data centers.
6) Moores Threads (Beijing): A leading domestic full-function GPU company, with a core team from international giants like NVIDIA. Its self-developed MUSA architecture integrates AI computing, graphics rendering, and four major engines, supporting training of trillion-parameter large models.
7) Horizon Robotics (Beijing): The Journey 6 automotive chip has a computing power of 560 TOPS, supporting full-stage intelligent driving, integrating BPU Nash architecture, with over 10 models expected to be mass-produced and delivered by 2025.
8) Suirian Technology (Shanghai): The SuiSi 3.0 adopts a 5nm process, with FP32 computing power of 60 TFLOPS, optimizing large model training costs through dynamic computing architecture, with thousand-card cluster efficiency comparable to international products.
9) Haiguang Information (Tianjin): The Deep Computing No. 2 DCU has a computing power of 90 TFLOPS, compatible with the CUDA ecosystem, supporting training of trillion-parameter models, with energy efficiency better than international competitors.
(Data compiled from public sources, industry research sharing, not for investment advice)
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