The instruction set architectures from abroad are essentially licensed and paid for, making it difficult to achieve independent domestic development. If the country defines its own instruction set architecture, it would not hold much significance, as processor architectures must be universal and globally supported. Now, with RISC-V, this issue can be effectively addressed; “RISC-V may truly become the independent instruction set architecture for domestic development.”
Recently, the fierce U.S.-China trade war has escalated, and the news of ZTE being banned by the U.S. has caused a stir in domestic public opinion. After years of discussions on chip “independent development,” it seems that at a critical moment, domestic chip companies are being choked.
Many media outlets have discussed the independent manufacturing of domestic chips, but few have addressed the issue of chip architecture. The chip instruction set architecture serves as a bridge between software and hardware operations. Many architectures have existed in the past, but over time, architectures like MIPS have gradually disappeared.
On July 18, 2016, Japanese SoftBank announced its acquisition of British chip CPU IP design company ARM for £24.3 billion (approximately $32 billion). ARM has over 100 partners in China, and last year, 17 billion chips based on ARM were produced, while the global population is only 7 billion. Industry insiders predict that in the era of IoT, chips based on the ARM architecture will reach trillions. Currently, the best commercial developments among domestic chips, such as Huawei HiSilicon and Unisoc, are both using ARM architecture for IC design.
Currently, mainstream architectures include Intel’s X86 and ARM architecture, with ARM being the most commonly seen in daily life; nearly all chip companies adopt ARM architecture.
It can be said that when discussing smartphones and IoT applications, ARM cannot be overlooked. However, as ARM is poised to dominate, even encroaching on Intel’s desktop PC and server businesses, the free and open-source RISC-V has emerged.
“RISC-V may truly become the independent instruction set architecture for domestic development,” believes Hu Zhenbo, an architect at Wuhan Juxin Microelectronics and a promoter of RISC-V. He stated that as a free architecture, RISC-V will compete with ARM. In traditional ARM-dominated areas such as mobile phones, it will maintain a strong presence, while in emerging fields like IoT, AI, and edge computing, RISC-V will have explosive potential.
What is RISC-V?
In 2017, two pioneers of modern computer architecture, John Hennessy and David Patterson, received the ACM Turing Award for that year. They are the initiators and promoters of RISC-V technology. Both of these masters have also joined Google.
Dissatisfied with the complexity of processor architectures like ARM and the limitations of related intellectual property, Berkeley University decided to invent a brand new instruction set architecture that could be freely used by any academic institution or commercial organization under the guidance of these two masters. The textbooks they compiled are being adopted globally, especially in the U.S., in universities that are using RISC-V as their curriculum. Globally, RISC-V has been defined as a national standard instruction set in many countries, such as India. It has also attracted significant attention in the industry, with Samsung explicitly stating it will use RISC-V in related products. In 2016, the RISC-V Foundation was established, with early members including Google, Western Digital, Taiwan’s Andes Technology, MediaTek, Hangzhou Zhongtian, Huawei, and others.
What is the significance of RISC-V?
As mentioned earlier, the chip instruction set architecture is a bridge between software and hardware operations. RISC-V, as a new instruction set, is a disruptive architecture whose goals differ from all previous commercial architectures. It can be used by any academic institution and commercial organization. While using ARM architecture incurs fees, RISC-V can be used for free by anyone.
This disruptive concept has not appeared in the history of processors before. Because of its disruptive nature, RISC-V was awarded the Best Technology in 2016.
What are the technical characteristics of RISC-V?
The technical characteristics of RISC-V are threefold: modularity, simplicity, and scalability. Firstly, it is a modular instruction set, combined with some extended instruction sets. The applications in embedded fields differ from those in server fields; this first characteristic is modularity.
The second characteristic is simplicity, as traditional X86 and ARM architectures are very extensive, and traditional commercial architectures are numerous and incompatible with each other. Since RISC-V is a latecomer architecture, it possesses a technological advantage, making it very streamlined.
Additionally, it is very easy to implement compared to traditional commercial operating systems. The last point is scalability; traditional ARM instruction sets do not allow for extensions, but RISC-V is convenient for scalability.
Due to RISC-V’s three major technical characteristics, it has attracted many large companies to support it. The RISC-V Foundation holds two to three seminars each year, with major companies and renowned universities co-hosting each time.
Is RISC-V the only way to achieve an independent domestic instruction set architecture?
Current status of instruction set architectures used by domestic processors
Domestic operating systems can use open-source Linux, but developing an independent chip instruction set architecture is comparatively difficult. Therefore, discussing “independent development” seems to revolve around chip architecture. The instruction set architectures from abroad are essentially licensed and paid for, making it difficult to achieve independent domestic development. If the country defines its own instruction set architecture, it would not hold much significance, as processor architectures must be universal and globally supported. “RISC-V may truly become the independent instruction set architecture for domestic development,” Hu Zhenbo stated. Now that RISC-V is available, it can effectively solve this issue, as it is organized by an open foundation and does not charge fees. Chinese companies can also join this foundation, and currently, the world is rapidly developing and generating a whole new ecosystem.
Hu Zhenbo indicated that currently, practitioners in the semiconductor and embedded fields are very focused on RISC-V.
Let’s take a look at the RISC-V versions. RISC-V is merely an instruction set architecture that defines a standard; you can create processors according to this standard. As it is an open instruction set architecture, individuals can also create their own versions. Over the past few decades, many different versions have emerged. Some commercial IP companies have also launched commercial versions, primarily abroad. So far, in mainland China, only the E200 developed by mainland China has been listed, and this list only includes mainstream versions.
What are the application scenarios of RISC-V?
Hu Zhenbo stated that in the industry and chip sectors, mainstream large companies are using RISC-V architecture to create products. Western Digital and AMD have explicitly stated that they are using RISC-V for chips, CEVA is using RISC-V for control chip cores, and Google is also using RISC-V for some new chip projects. There’s also Micron. In addition to these large companies, many industry giants are now commonly using RISC-V for core development. Many specialized companies have emerged around commercial technology, and the U.S. quickly accepts new technologies.
Currently, there are no clear commercial companies in mainland China pursuing this. The notable companies listed above are very representative. Some representative chips include the Sifive from the U.S., which uses a Linux processor core, and another is the Greenwaves IoT application processor, a very low-power IoT processor launched by a European company, which also uses RISC-V architecture.
The significance of RISC-V technology for IoT
So, what significance does RISC-V technology bring to IoT?
Firstly, there is ongoing fragmentation; IoT is a fragmented ecosystem, and if differentiated products can be quickly defined within this ecosystem, it will meet the same technical requirements, including low power consumption, low cost, security, as well as edge and enhanced computing.
With an increasing trend towards application-centric models, the focus is shifting away from chip companies. Previously, companies like MTK and Qualcomm dominated applications, while IoT is becoming fragmented and application-centered, replacing the traditional chip company-centric model. Additionally, the prices for traditional ARM IP are still very high, and the release times for each version are lengthy, raising the innovation threshold, making it difficult for smaller companies to acquire IP, and challenging to respond quickly to edge computing demands.
RISC-V effectively addresses these issues. First, RISC-V is a universally applicable standard instruction set, with a long-term positive ecosystem. Universities worldwide are teaching RISC-V, and over 5 to 10 years, proficiency in RISC-V will become a basic skill. Moreover, its architecture is open and free, lowering the innovation threshold, enabling individuals and companies with technical capabilities to use this architecture to develop interesting applications. Its cost advantages also reduce the cost of innovation.
For these reasons, RISC-V can quickly respond to fragmentation, and more and more new startups are using RISC-V cores, hoping to enter the field of technological innovation. An increasing number of domestic companies are also adopting RISC-V cores. Hu Zhenbo believes that RISC-V can lower the costs and thresholds of edge computing, leading to rapid innovative products.
The E200 Processor Developed Independently Based on RISC-V
Finally, Hu Zhenbo introduced the first MCU using RISC-V architecture, the E200. This globally smallest 32-bit RISC-V core can achieve ultra-low power consumption, targeting the ARM M0+ MCU core, ensuring safety and control without paying royalties to foreign companies. Hu Zhenbo stated that the E200 also has a series of product lines including 205, 205FD, etc.
“This is the charm of an open instruction set; more unimaginable instruction set versions will emerge in the future,” Hu Zhenbo concluded.
Source: International Electronic Business Author: Li Jian
Related Articles
Several chip manufacturers have stopped supplying ZTE, and even the Android system may no longer be usable!
The U.S. sanctions on ZTE have unveiled the “Emperor’s New Clothes” of China’s semiconductor industry?
Top 10 integrated circuit design companies in China in 2017: Huawei HiSilicon ranked first, Unisoc second!
Surpassing MediaTek, Nvidia enters the global top ten semiconductor suppliers for the first time
Black Shark gaming phone released: the original team from Zhongsu Technology makes a comeback after setbacks with LeEco!
Samsung loses again: must compensate Huawei 80 million yuan, 22 products will be banned from sale!
Huawei P20 Pro teardown: what secrets lie within the rear “Leica triple camera”?
The Chinese text messages that brought down the Indian army reveal China’s 20-year rise against the U.S., Japan, and Europe.
Investing $100 billion over 10 years! Uncovering Zhao Weiguo’s “China Chip” strategy
For industry exchanges and cooperation, please add WeChat: xintiyan001. Submissions should be sent to: [email protected]. Official WeChat group: 221807116