Recently, Arm held the Arm UNLOCKED summit in Shanghai, officially launching the Arm Lumex Compute Subsystem (CSS) aimed at mobile devices.

What is Lumex CSS? In the simplest terms, it is essentially a “marketing concept” from Arm. Lumex CSS includes at least Arm’s brand new C1 series CPU architecture design, G1 series GPU architecture design, C1-DSU inter-core bus design, and several other peripheral system IP designs, all packaged together.

It is important to note that Lumex CSS does not equate to a complete SoC architecture license, as it does not include many essential components commonly found in mobile platforms, such as NPU, baseband, power management, and ISP. This is why when the concept of “Arm CSS” first attracted attention this year, many people refuted the idea that “even if you buy the complete Arm CSS, you cannot directly create a mobile SoC.”

Of course, based on some information circulating online, it appears that major manufacturers are primarily engaged in secondary development based on Arm’s architecture and even instruction set licensing. Therefore, Lumex, as an “official public version,” essentially still targets small and medium chip manufacturers that lack self-research capabilities.

However, this does not mean that the newly announced Lumex CSS is meaningless for those interested in the mobile industry and curious about the next generation of mobile device platforms. A deeper exploration of its content reveals many interesting and noteworthy aspects.

• Significant Changes in Product Naming Logic, but Actual Effects Remain to be Discussed

As mentioned earlier, Arm Lumex CSS includes new CPU and GPU IP. Unlike in the past when Arm often “only updated big cores and did not replace small cores,” this time they have not only updated all CPU and GPU architectures but also made significant adjustments to the entire product naming system.

Specifically, Arm has released four new CPU IPs: C1-Ultra, C1-Premium, C1-Pro, and C1-Nano.

In terms of positioning, C1-Ultra represents the “super big core” in flagship SoCs, replacing the current Cortex-X925.

C1-Premium represents the “sub-flagship big core”; Arm explains that its architecture is the same as the super big core, but with smaller cache and manufactured using a density library (which means lower frequency but also lower power consumption). In other words, it is essentially a “refined” version of the Cortex-X4m previously used by MediaTek, officially establishing itself as a separate CPU product line.

The remaining C1-Pro and C1-Nano are easy to understand, as they inherit the product positioning of Cortex-A725 and Cortex-A520, respectively.

Meanwhile, Arm has also released a GPU IP family named “Mali G1.” There is no architectural difference between the entry-level version and the highest configuration model; they are differentiated only by the number of shader cores. The core count can be customized from 1 core to 24 cores, and based on the number of cores, they are classified into at least three levels: G1-Ultra, G1-Premium, and G1-Pro.

However, Arm did not specify the exact core count differences between each version, nor did it clarify whether there is an entry-level “G1” or “G1-Nano.”

• New IP Generally Improves Performance, but Power Consumption is Worth Noting

From a naming logic perspective, Arm’s new product system clearly aims to express their “new” and “different from the past” identity. On the other hand, compared to the previous three-digit naming convention, the new IP naming pattern is evidently designed to make future generational distinctions more apparent. For example, future G2 and G3 will quickly indicate that they are newer than the current G1, making it easier to distinguish between “old” and “new” compared to the current X925, A710, and A520 naming.

However, this new naming method also brings a problem: consumers find it harder to intuitively judge the performance levels between cores of the same generation. Yes, C1-Ultra is certainly much faster than C1-Nano, but just how much faster is less convenient to assess.

Moreover, even when comparing to previous generation products, Arm has not fully clarified the performance improvements of the new IP.

For instance, they claim that compared to the previous generation “super big core” Cortex-X925, C1-Ultra has a 12% improvement in IPC (instructions per clock cycle) and a 26% improvement in microarchitecture performance.

However, Arm did not provide specific data on the performance improvement of C1-Premium compared to the previous generation “sub-flagship super big core.” This may be because the X925 itself does not have a sub-flagship variant, and the only comparison can be made with the previous generation X4m, but it also raises the possibility that the new sub-flagship architecture does not have significant improvements, making the comparison data less favorable.

In contrast, the performance improvement data for C1-Pro is more specific. According to Arm, compared to Cortex-A725, C1-Pro has a 26% lower power consumption at the same performance level; if achieving the same power consumption, C1-Pro can be 11% faster than Cortex-A725. Additionally, if both are set to the same clock frequency, C1-Pro can be up to 16% faster than Cortex-A725.

From these three sets of data, it can be seen that under the same clock frequency, the new C1-Pro big core’s power consumption is actually slightly higher than that of Cortex-A725, but due to greater performance improvements, the overall energy efficiency ratio has still increased.

Finally, regarding the “small core” C1-Nano, Arm provided relatively detailed performance data, but unfortunately, from these data, it appears that C1-Nano’s improvements are not focused on performance but rather on area reduction, power consumption reduction, and support for the latest instruction sets.

According to Arm, in SPECint2017, C1-Nano’s comprehensive score improved by approximately 5.5% compared to Cortex-A520. Under the same program processing conditions, its energy efficiency improved by 26%.

Finally, regarding the Mali G1-Ultra GPU, Arm stated that its performance in benchmarking software and games improved by 20% compared to the previous generation (G925), while single-frame power consumption decreased by 9%. Therefore, it can be calculated that its overall power consumption has actually increased, with an increase of approximately 9.2%. Fortunately, the G1-Ultra’s ray tracing performance can reach twice that of the previous generation, which still holds promise for exceeding a 20% frame rate improvement in future “heavy ray tracing” mobile games.

• New Flagship Phones are Set to be Faster, but Entry-Level Models Face Uncertainty

After discussing all this, what does Arm’s new architecture mean for the upcoming new generation of smartphones and SoCs?

First and foremost, it is crucial to note that neither in Arm’s planning nor in the current rumors is there any possibility that the new flagship mobile platform will use the C1-Nano “small core.” Arm’s statement is that the top flagship may use two C1-Ultra cores paired with six C1-Pro cores. We cannot rule out the possibility that manufacturers will reduce the number of “mid-cores (C1-Pro)” and add more “sub-big cores (C1-Premium)” to achieve higher benchmark scores.

Based on the previous analysis and recent industry trends, unless TSMC’s N3P process makes a significant breakthrough again, it is likely that various manufacturers will further increase the peak clock frequency of flagship SoCs while using the new CPU and GPU in the new flagship platform, resulting in an increase in peak power consumption rather than a decrease.

However, there is no need for everyone to panic, as the new architecture’s IPC has indeed improved, which means that in scenarios beyond benchmarking, including heavy-load gaming, as long as there are no new “performance killers,” the actual operating frequency of the new flagship will inevitably be lower than that of current platforms. The result is that energy efficiency during daily use will certainly see significant improvements, and even the power consumption during heavy-load gaming may further decrease.

In contrast, what is more concerning is the low-power devices that are purely based on C1-Nano. Although current evidence shows that the new architecture objectively has improvements compared to Cortex-A520, on one hand, its performance improvement is clearly much smaller than that of other “big cores.” On the other hand, as more flagship and sub-flagship platforms “abandon” small cores, software developers, chip design manufacturers, and even future Arm may increasingly lose motivation for improving small cores.

It is worth noting that in Apple’s Apple Watch, the CPU architecture driving the watch has long been based on the A16 efficiency core’s “Sawtooth” scheme, which is a smaller version of the “mid-core” (more closely resembling A725 or this time’s C1-Pro). For mainstream consumer electronics, the complete phase-out of purely low-power “small cores” is likely just a matter of time.

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