Achieving Low EMI, High Density, and High Efficiency Power Conversion with Integrated Buck DC/DC Modules

As the integration of electronic devices continues to increase and their quantity grows, designers are constantly faced with the pressure to improve efficiency while reducing costs, sizes, and electromagnetic interference (EMI). Although power supplies have also improved in power density and efficiency, designers now face the challenge of developing multi-rail power solutions for heterogeneous processing architectures that may consist of ASICs, DSPs, FPGAs, and microcontrollers.

Traditionally, buck DC/DC converters have been used to power such architectures, but as the number of power rails continues to increase, using traditional discrete buck DC/DC converters with control ICs, internal or external power MOSFETs, along with external inductors and capacitors can become both complex and time-consuming. In contrast, designers can utilize self-sufficient buck DC/DC converter modules with multi-rail and programmable sequencing. These modules can better control EMI, generate less heat, and require less area.

This article will review the power system requirements for embedded design, discuss various methods and considerations that designers need to take into account, and then introduce the concept of self-sufficient buck DC/DC modules. Using devices from Monolithic Power Systems as an example, we will briefly review the design and layout considerations that designers should keep in mind to maximize the performance advantages of these modules.

Why Embedded Systems Need Multiple Power Rails

Embedded designs such as 5G base stations are designed to support the increasing data requirements of smartphones and smart connected devices, with applications covering home and industrial automation, autonomous vehicles, healthcare, and smart wearable devices. These base stations typically use a 48-volt input power supply, which is stepped down to 24 volts or 12 volts via DC/DC converters, and then further down to many sub-power rails below 3.3 volts to 1 volt to power the ASICs, FPGAs, DSPs, and other devices in the baseband processing stage. Typically, power rails need to be sequenced for startup and shutdown, which further increases the complexity of the power system.

Taking 5G base stations as an example, traditional CPUs alone cannot meet processing demands. However, using accelerator cards in conjunction with FPGAs offers advantages in system reconfigurability, flexibility, shorter development cycles, high parallel computing, and low latency. But the space for FPGA power is becoming increasingly limited, and the performance requirements for power rails are also complex (Figure 1).

Output voltage offset: The output voltage deviation of the voltage rail must be less than ±3%, and sufficient margin should be provided during design. Optimizing the control loop, increasing bandwidth, and ensuring stability should be done with caution when using and designing decoupling capacitors.
Monotonic startup: The initial values of all voltage rails must rise monotonically, and the design should prevent the output voltage from returning to its starting value.
Output voltage ripple: During steady-state operation, the output voltage ripple of all voltage rails (except analog voltage rails) must not exceed 10 millivolts (mV).
Timing: FPGAs must meet specific timing requirements during startup and shutdown.

Achieving Low EMI, High Density, and High Efficiency Power Conversion with Integrated Buck DC/DC Modules

As the demands for data processing bandwidth continue to rise, the requirements for current and power from processors are becoming increasingly stringent. The computational density and floating-point speed requirements for accelerator cards are also becoming harder to meet. The accelerator card slots generally use the PCIe standard, so the board size is fixed. Due to the increasing computational demands, the size of processors is continually growing, leaving very little space for power supplies.

Alternative Power System Designs

Using traditional discrete buck DC/DC converters, paired with control ICs, internal or external power MOSFETs, along with external inductors and capacitors, constitutes one method of powering embedded systems. As mentioned above, when multi-rail power solutions are required, it becomes a complex and time-consuming process for designers. In addition to maximizing efficiency and minimizing solution size, designers must also be cautious about the layout and placement of filter components to minimize conducted and radiated EMI caused by switching currents in the converter and inductor circuits (Figure 2).

DC/DC converters typically generate conducted EMI through the magnetic fields formed by the current loop between the output power MOSFET switch node to ground and the input capacitor to ground. Additionally, these converters also generate radiated electric field EMI through the MOSFET switch node to the inductor connection because the device continuously switches from high input voltage levels to ground, resulting in high dV/dt and radiated electric field EMI generated by the electromagnetic fields produced within the inductor. If not designed properly, this often leads to time-consuming EMI laboratory retests and multiple design iterations.

Using a four-rail solution to power an ASIC or FPGA with discrete buck DC/DC converters can occupy 1220 square millimeters (mm²) (Figure 3). A solution based on a power management IC (PMIC) can reduce this number to about 350 mm². As an alternative, designers can use independent four-output DC/DC converter modules, reducing the solution size to only 121 mm² while simplifying the design process and speeding up time to market. Advances in semiconductor process technology and packaging structure mean that the latest generation of DC/DC modules achieves very high power density, high efficiency, and good EMI performance in a smaller form factor.

New construction technologies, such as package-on-package (PoP) and “mesh-connected” lead frame technologies, mean that ICs, inductors, and passive components can be directly mounted on the lead frame without the need for wire bonding or additional internal PCBs (Figure 4). Compared to older structures using internal PCB substrates or wire bonding, these new technologies minimize the length of printed lines, and direct connections with passive components can maintain low inductance, thereby minimizing EMI.

Using land grid array (LGA) packaging forms, directly mounted to the target PCB, has a lower EMI curve compared to other leaded packages that can radiate EMI, such as single inline (SIL) or SIP converters.

Four-Output Programmable Integrated DC/DC Module

To meet the multi-rail, high power density requirements of embedded systems, designers can use the MPM54304 from Monolithic Power Systems (Figure 5). The MPM54304 is a complete power management module that integrates four high-efficiency buck DC/DC converters, inductors, and a flexible logic interface. The MPM54304 operates within an input voltage range of 4 volts to 16 volts and can support output voltages from 0.55 volts to 7 volts. The four output rails can support currents of up to 3 amps (A), 3 A, 2 A, and 2 A, respectively. Two of the 3 A rails and two of the 2 A rails can be paralleled, providing 6 A and 4 A currents, respectively. Designers should note that the maximum output current in parallel mode is also limited by total power dissipation. This allows for flexible selection of several output configurations (but limited by total power dissipation).

3 A, 3 A, 2 A, 2 A
3 A, 3 A, 4 A
6 A, 2 A, 2 A
6 A, 4 A

The MPM54304 also provides internal sequencing for startup and shutdown. Rail configuration and sequencing can be pre-programmed via multi-time programmable (MTP) fuses or through the I²C bus.

This fixed-frequency constant on-time (COT) controlled buck DC/DC converter features a fast transient response capability. Its default switching frequency of 1.5 megahertz (MHz) significantly reduces the size of external capacitors. During continuous conduction mode (CCM) operation, the switching clock locks and phase shifts from buck 1 to buck 4. The output voltage can be adjusted via the I²C bus or preset by MTP electronic fuses.

The device has comprehensive protection features, including under-voltage lockout (UVLO), over-current protection (OCP), and thermal shutdown. The MPM54304 requires very few external components and comes in a space-saving LGA (7 mm x 7 mm x 2 mm) package (Figure 6). The flat profile of the LGA makes it suitable for backplane arrangements or placement under a heatsink.

Design and Layout Considerations

The edge pin layout of the MPM54304 simplifies layout and PCB design. Only five external components are needed, making the overall solution compact and neat. The LGA package ensures that a solid ground plane covers most of the area beneath the module, which helps to enclose the eddy current loop and further reduce EMI.

The input current of this buck converter is discontinuous, and while maintaining a steady DC input voltage, a capacitor is needed to provide AC current to the converter. Designers should use low equivalent series resistance (ESR) capacitors for optimal performance. X5R or X7R ceramic capacitors are recommended due to their low ESR and small temperature coefficient. For most applications, a 22 microfarad (µF) capacitor is sufficient.

Efficient PCB layout is critical for the stable operation of the MPM54304. To achieve better thermal performance, a four-layer PCB is recommended (Figure 7). For optimal results, designers should follow these guidelines.

Minimize power loop lengths
Connect PGND directly with a large ground plane. If the bottom layer is a ground plane, add vias near PGND.
Ensure that high current paths at GND and VIN are short and direct with wide printed lines.
Place ceramic input capacitors as close to the device as possible.
Keep the input capacitor and IN as short and wide as possible.
Place VCC capacitors as close to the VCC and GND pins as possible.
Connect VIN, VOUT, and GND to a large copper area to improve thermal performance and long-term reliability.
Isolate the input GND area from other GND areas on the top layer and connect them through multiple vias on the internal and bottom layers.
Ensure that there is an integrated GND area on the internal or bottom layers.
Use multiple vias to connect the power plane to the internal layers.

Conclusion

As processing architectures continue to evolve to meet demanding data applications, designers face the challenge of developing multi-rail power solutions: requiring these solutions to support greater processing capabilities and more compact or smaller electronic devices. In designing the power solutions for these systems, buck DC/DC converters are key, but their implementation can be complex.

As shown, designers can turn to self-sufficient buck DC/DC converter modules with multiple power rails and programmable sequencing capabilities to simplify the design process and accelerate time to market. At the same time, new construction technologies give these self-sufficient modules many performance advantages: better control of electromagnetic interference, improved heat dissipation, and reduced footprint.

Author: Jeff Shepard

Source: Digi-Key

Disclaimer: This article is an original work by the author, and the content reflects the author’s personal views. Electronic enthusiasts only reprint it to convey a different perspective and do not represent the endorsement or support of the Electronic Enthusiasts Network for this view. If there are any objections, please feel free to contact the Electronic Enthusiasts Network.

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