System Registers

How to Read MOESI State and Tag Information in Cache Line on ARMv8

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How to Read MOESI State and Tag Information in Cache Line on ARMv8

This article takes the Cortex-A53 processor as an example, accessing the internal storage units (tag RAM and dirty RAM) in the processor to read the MOESI information in the cache line. The Cortex-A53 provides a mechanism to access some internal storage units used by the Cache and TLB by reading certain system registers. This feature … Read more

Comprehensive Guide to ARM Cortex-M0 System Registers

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Comprehensive Guide to ARM Cortex-M0 System Registers

Hello everyone, I am the blue fish tail, and this is Fish World Talk. Recently, I have been reading the book “Authoritative Guide to ARM Cortex-M0” translated by Wu Changyu and Wei Jun, and I want to have a more systematic understanding of the MCU at the core level. Because my usual work mostly stays … Read more