Testing Real Silicon: Automated RISC-V Hardware in the Loop
Author: Ariel D’Alessandro, Collabora Abstract: With the rise of RISC-V, the demand for stable and scalable hardware testing infrastructure is becoming increasingly important. To fill this gap in the ecosystem, the RISE project and Collabora have integrated two RISC-V development boards (Banana Pi BPI-F3 and SiFive HiFive P550) into Collabora’s public LAVA testing lab. Utilizing … Read more