Evaluation of High-Speed Cache Coherence Host-to-FPGA Interface Using CCIX

Evaluation of High-Speed Cache Coherence Host-to-FPGA Interface Using CCIX

Chiplet technology and NoC technology have become important methods to address the limitations of Moore’s Law. Modern CPU chips no longer use ordinary IO interfaces; instead, they utilize a standard NoC bus interface that can connect to dedicated NoC bus DIEs (tentatively referred to as IO DIEs) using Chiplet technology. By integrating multiple CPU cores … Read more