Chip Probing

Multi-Wordline Activation in DRAM CP Testing

by
Multi-Wordline Activation in DRAM CP Testing

Part One: Evolution of DRAM Technology and Wafer-Level Testing 1.1 Duality of DRAM Feature Size Shrinkage Dynamic Random Access Memory (DRAM) serves as the core storage component of modern computing systems, with its technological evolution consistently advancing towards high density and high performance goals. From DDR1 to DDR5, the generational iterations have seen exponential increases … Read more

The Semiconductor Jargon World: A Guide from Tape-Out to Packaging Testing

by
The Semiconductor Jargon World: A Guide from Tape-Out to Packaging Testing

Hello everyone, I am Chip Language. Today, let’s dive into the world of chip cultivation—from design to mass production, chips must go through numerous challenges: Tape-Out is the foundation, packaging testing is the tribulation, and yield is the ascension KPI… The fate of engineers is to protect the chips while sacrificing their hair for merit. … Read more