Hello everyone, I am Pi Zi Heng, a serious technical person. Today, I will introduce to you the actual capture of Flash signal waveforms to observe the AHB read access situation under the i.MXRT FlexSPI peripheral. In the previous article “Actual Capture of Flash Signal Waveforms to Observe AHB Read Access under i.MXRT FlexSPI Peripheral … Read more
Hello everyone, I am Pi Zi Heng, a serious technical guy. Today, I will share with you the experience of further improving code execution performance on i.MXRT. The topic I want to discuss today is related to a large project based on i.MXRT1170 that I have been involved in recently. I am working on the … Read more
The Memory Protection Unit (MPU) is a computer hardware unit that provides memory protection functionality, typically integrated within the CPU. The MPU is a simplified version of the Memory Management Unit (MMU), offering only memory protection support, often used in low-power processors that do not require features like virtual memory management.[1] The MPU allows programs … Read more
Author’s Note：Many readers have previously consulted me about the MPU and Cache usage related issues of the NXP S32K3xx series MCUs. The performance of a powerful dual-issue high-performance CPU core like the Cortex-M7 is often limited by the on-chip Embedded Flash (eFlash, with a working frequency ≤50MHz) when operating at high speeds (Core clock ≥150MHz), … Read more
ARM Cortex-M4 and Cortex-M7 are two embedded processor cores designed by ARM, widely used in the microcontroller (MCU) field. They both belong to the Cortex-M series, but there are significant differences in performance, features, and applicable scenarios. Here is a detailed comparison between the two: 1. Performance Feature Cortex-M4 Cortex-M7 Architecture ARMv7-M ARMv7-M Clock Frequency … Read more
Today, Pi Zi Heng introduces the actual capture of Flash signal waveforms to examine the AHB read access conditions under the FlexSPI peripheral of i.MXRT. In the previous article “Actual Capture of Flash Signal Waveforms to Examine AHB Read Access Conditions Under the FlexSPI Peripheral of i.MXRT (With Prefetch)” Pi Zi Heng captured the timing … Read more
Consumer-grade, industrial-grade, and automotive-grade multi-core MCUs have gradually become popular from high-end applications, especially in the automotive sector where some high-end specifications have reached six cores. The operating systems for automotive multi-core MCUs are generally adapted by basic software manufacturers, with FreeRTOS being less common. However, automotive MCUs still hold significance for applications that do … Read more
Tight Coupled Memory on Microchip Cortex®-M7 MCU This document describes how to configure and use the tight coupled memory (TCM) features in PIC32C and SAM MCUs using the MPLAB® XC32 compiler and MPLAB Harmony v3 software development framework within the MPLAB X IDE. TCM offers numerous advantages for application developers, providing performance equivalent to when … Read more
Keywords: DWT, DEMCR Table of Contents 1. Introduction 2. Research 3. Enabling DWT for Counting 4. Conclusion 01 Introduction When using the STM32H7, the customer wants to utilize DWT counting to measure code execution time and evaluate execution efficiency. The customer found that after power cycling or resetting, they could not enable DWT for counting. … Read more
The i.MX RT series is positioned as a “cross-boundary processor,” which is neither a traditional MCU nor a traditional MPU, but combines the advantages of both: Analysis of NXP Cross-Boundary MCUs: i.MX RT700/600/500 MCU Series 1. High Performance It uses a Cortex-M7 core (up to 1 GHz) or a multi-core heterogeneous design (such as M7+M4), … Read more