The FDM320RV335 is a high-performance 32-bit floating-point DSP processor optimized for real-time control applications. This chip is based on Zhongke Benyuan’s self-developed RISC-V architecture DSP core, SpringCore1.0, with a working frequency of 150MHz. It integrates high-precision ADC, high-resolution PWM, eCAP, and eQEP interfaces on-chip, enabling high-performance motor control and power control. Application scenarios include industrial control, new energy, electric vehicles, and power electronics.
Main product features are as follows:
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High-performance digital signal processing technology
– Up to 150MHz– Peak performance of 150MIPS
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High-performance 32-bit SpringCore1.0 core
– IEEE 754-2008 single-precision floating-point unit (FPU), RNE, RTZ, RDN, RUP, RMM rounding modes– 16×16 and 32×32 multiply-accumulate operations (MAC), 40-bit MR register (Multiply-accumulate Register)– 16×16 dual multiply-accumulate operations (MAC)– Harvard bus architecture– Fast interrupt response and processing, enhanced implementation of RISC-V interrupt standards– Unified memory programming model
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6-channel DMA processor
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16-bit or 32-bit external interface
– Address range exceeding 4M×8
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On-chip memory
– 512K×8 flash memory, 16K×8 SARAM– 4K×8 one-time programmable (OTP) ROM
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Boot ROM (16K×8)
– Supports software boot mode– Standard mathematical lookup table
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Clock and system control
– Supports dynamic phase-locked loop ratio changes– On-chip oscillator– Safety device timer module
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GPIO0 to GPIO63 pins can connect to one of eight external core interrupts
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Supports peripheral interrupt expansion for all 58 peripheral interrupts
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128-bit security key/lock
– Protects flash/OTP/RAM modules– Prevents firmware reverse engineering
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Enhanced control peripherals
– Up to 18 pulse-width modulation (PWM) outputs– Up to 6 high-resolution PWM outputs with 150ps micro-edge positioning resolution– Up to 6 event capture inputs– Up to two quadrature encoder interfaces– Up to 8 32-bit timers (6 eCAP and 2 eQEP)– Up to 9 32-bit timers (6 PWM and 3 XINTCTR)
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Three 32-bit CPU timers
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Serial port peripherals
– Up to 2 controller area network (CAN) modules– Up to 3 SCI (UART) modules– Up to 2 McBSP modules (configurable as SPI)– One SPI module– One internal integrated circuit (I2C) bus
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12-bit analog-to-digital converter (ADC), 16 channels
– 80ns conversion rate– 2 × 8-channel input multiplexer– Two sample-and-hold– Single/synchronous conversion– Internal or external reference
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Up to 88 programmable GPIO pins with input filtering capability
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Supports RISC-V Debug 0.13.2 debugging standard
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Advanced simulation features
– Analysis and breakpoint functionality– Real-time debugging with hardware assistance
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Development support includes
– ANSI C/C++ compiler/assembler/linker– Digital motor control and digital power software libraries
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Low power modes and energy-saving modes
– Supports IDLE, STANDBY, HALT modes– Can disable independent peripheral clocks
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Byte order: Little-endian mode
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Package options:
– Lead-free, green packaging– Plastic quad flat package with 176 pins (LQFP176)
Product performance:
About the SpringCore1.0 DSP Processor Core
SpringCore1.0 is a high-efficiency, low-cost 32-bit floating-point DSP processor core developed independently by Zhongke Benyuan based on the RISC-V architecture. It adopts the RV32IMFC-Ext instruction set architecture, is divided into 8 pipeline stages, and operates at a frequency of 150MHz, primarily targeting high-performance real-time signal processing fields such as digital power and motor control.
Main features include:
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Based on RISC-V architecture, RV32IMFC-Ext instruction set;
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Static single-issue, supports instruction prefetch;
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Operating frequency of 150MHz
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Supports 16-bit compressed instructions;
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37 signal processing extension instructions;
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8-stage pipeline, with 3 stages for instruction fetch and 5 stages for decode and execute;
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32-bit addressable space;
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Supports fixed-point and floating-point data type calculations;
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Supports 32 integer general-purpose registers X0-X31;
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Supports 32 floating-point general-purpose registers F0-F31;
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Supports hardware RAW and WAR dependency checks;
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Fast context switching enhances real-time processing response speed;
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Supports RISC-V Debug 0.13.2 debugging standard, allowing for breakpoint setting, single-stepping, and other operations;
The structural block diagram of SpringCore is shown below:
About Zhongke Benyuan
Zhongke Benyuan is a supplier of digital signal processor (DSP) chips. The company adopts an independently innovative architecture, providing industry-leading DSP products and solutions for industrial control, new energy, electric vehicles, home appliances, and rail transportation. The company has achieved serial production of DSPs, with product performance and quality highly recognized by customers.
Zhongke Benyuan adheres to the values of “achieving customers, integrity and responsibility, continuous innovation, and seeking truth from facts,” and practices the corporate culture of “unity, struggle, responsibility, inclusiveness, sharing, and excellence,” committed to becoming a world-class DSP enterprise, creating value for customers, and promoting social development with technological power.
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