Intense competition at high levels, with leading directions locked on optical communication.
The second half of AI focuses on domestic computing power: frequent industrial signals indicate that the next round of significant market trends can be expected.
Oracle orders + Rubin architecture + robots: a resonance across the entire industry chain.
Deep collaboration rather than mere concept stacking: solid-state batteries + PCB dual concept targets and logic.
Recently, the computing power sector in the US stock market has exploded, with Oracle’s performance exceeding expectations, driving stock prices to soar. The launch of NVIDIA’s Rubin CPX new GPU, along with the continuous rise and new highs of Google and Broadcom, points to the core of the computing power revolution—ASIC (Application-Specific Integrated Circuit). ASIC is becoming the key to shifting AI computing power from a general path to a specialized path. Its rise not only reshapes the competitive landscape of computing power but also drives incremental opportunities across the entire industry chain. Meanwhile, the price surge in the global storage market in the second half of 2025 resonates with the high-end storage demand driven by ASIC, collectively outlining the transformative landscape of the technology industry in the AI era.Part One: The Core of Computing Power Revolution: ASIC Opens the Competition in the Second HalfAmong the two paths of AI computing power, the general path dominated by NVIDIA GPUs has long occupied the mainstream. However, as AI application scenarios deepen, the specialized path represented by ASIC is becoming the new direction in the industry due to its advantages in solving the “memory wall” pain point and higher cost-effectiveness after mass production. The layouts and performances of Google and Broadcom, as well as NVIDIA’s route adjustments, all confirm that ASIC has entered a high prosperity cycle. ASIC: From Technical Advantages to Market ExplosionAI computing power exists in two major paths:
- General Path (GPU): Represented by NVIDIA GPUs, suitable for various high-performance computing tasks, but faces the “memory wall” problem when processing large-scale matrix multiplications, resulting in low efficiency in data transmission between memory and computing units, which restricts performance.
- Specialized Path (ASIC): Custom-designed for specific AI tasks, allowing targeted optimization of hardware structure, completely solving the “memory wall” problem. Once mass-produced, costs can be significantly reduced, and cost-effectiveness far exceeds that of general GPUs.
Currently, the technical advantages of ASIC have transformed into market momentum, and the dynamics of leading enterprises have become important signals:
- Google: The promoter and large-scale user of ASIC. As one of the world’s largest ASIC designers and users, Google’s new generation TPU (Tensor Processing Unit) Ironwood has significantly improved performance, directly competing with NVIDIA’s B200 series chips, showing clear advantages in cost-effectiveness and power consumption. Under the catalysis of applications like Gemini and Nano banana, Google’s token volume has surged, continuously pushing up TPU demand, which has now exceeded 2 million units. Notably, Google is actively expanding the application scenarios of ASIC—recently engaging with small cloud service providers reliant on NVIDIA chips to discuss hosting Google AI chips in their data centers, attempting to accelerate the industry’s acceptance of specialized chips through a “shared computing power” model.
- Broadcom: High growth certainty of ASIC suppliers. As a core overseas ASIC supplier, Broadcom’s performance guidance directly confirms the high prosperity of the sector. Its latest earnings call clearly stated that the high growth rate of ASIC business will continue at least until 2027, with current orders exceeding $100 billion, and new customers locking in $10 billion orders to be delivered in 2026. The high certainty and long cycle of orders support Broadcom’s stock price to continuously reach new highs, becoming the “performance benchmark” in the ASIC sector.
- NVIDIA: General leader extending into specialized scenarios. In response to competitive pressure from ASIC, NVIDIA has also begun to adjust its route—the newly launched Rubin CPX, while still categorized as a GPU, has been clearly defined as a “dedicated inference chip,” marking its expansion from “training dominance” to “dual dominance in training and inference,” launching specialized solutions for segmented scenarios to build a deeper moat. This move essentially acknowledges the specialized route of ASIC, further proving that specialization has become an inevitable trend in the computing power industry.
In summary, Google’s large-scale applications, Broadcom’s high order growth, and NVIDIA’s route adjustments all point to one conclusion: ASIC has opened the second half of the computing power revolution, becoming the core engine of industry growth.Four Incremental Opportunities Driven by ASIC in the IndustryThe rise of ASIC not only changes the competitive landscape of computing power but also raises new requirements for the upstream and downstream of the industry chain, significantly enhancing the value of multiple links and creating clear market opportunities:
- OCS All-Optical Switches After Google introduced OCS (Optical Cross-Connect) technology in the TPU v4 cluster, it achieved significant performance improvements and reduced energy consumption while minimizing the optoelectronic conversion stage, lowering system complexity and failure points, fully validating the practical value of OCS in ultra-large-scale AI computing scenarios. According to industry forecasts, Google’s TPU shipments are expected to reach 2 million units by 2025 and increase to 3 million units by 2026; based on the networking calculation of 2 million TPUs, Google alone will drive the shipment of about 23,000 OCS switches, sufficient to support a considerable scale of niche market, directly benefiting related equipment suppliers.
- RISC-V Architecture The combination of RISC-V open-source architecture and ASIC naturally adapts to the demand for self-controlled chips in China, providing a strategic path for domestic enterprises to break through technical barriers. Currently, “RISC-V + ASIC” is rapidly extending from the traditional MCU market to high-end fields such as servers and AI training, with domestic enterprises already laying out in this direction, likely to seize the initiative in the process of computing power autonomy.
- Liquid Cooling and New Packaging The high computing power density of ASIC raises higher requirements for cooling and packaging technologies:
- Liquid Cooling: Compared to traditional air cooling, liquid cooling is more efficient and can meet the high-density cooling needs of ASIC clusters, with its application ratio in AI data centers expected to rise rapidly.
- New Packaging: Chiplet architecture is the mainstream design scheme for ASIC, driving the development of new packaging technologies such as 3D SoIC and HBM integration. The value of single chips using these technologies can increase by 3-5 times, creating incremental space for packaging companies.
- PCB and Optical Modules ASIC drives the hardware upgrade of AI servers, directly boosting the demand for PCBs and optical modules:
- PCB: AI servers are shifting from traditional board types to 56+ layer high-density boards, with materials upgraded from M8 to M9, increasing the value of single rack PCBs by 30%, benefiting high-end PCB manufacturers.
- Optical Modules: The demand for 400G/800G high-bandwidth optical modules will grow due to the higher data transmission rate requirements of ASIC clusters, further opening up the optical module market space.
Part Two: Price Surge in the Storage Market: Resonating with ASIC DemandThe high-end computing power demand driven by ASIC also injects new momentum into the storage market. In the second half of 2025, a price storm covering DRAM and NAND will sweep through the global storage market, with DDR4 memory experiencing a 72% increase over six months, and SanDisk being the first to raise NAND prices by over 10%. This wave of price increases stems not only from the original manufacturers’ profit recovery demands but also resonates with the high-end storage demand driven by ASIC, as traditional cyclical patterns are being restructured by AI demand.DRAM: The Exit of Old Processes and High-End Demand Driving Comprehensive Price IncreasesThe core logic behind the price increase in the DRAM market is the shift of original manufacturers’ capacity towards high-end products and the growth of high-end demand driven by ASIC:
- Capacity Structure Adjustment: Starting from the third quarter of 2024, leading original manufacturers will shift low-profit traditional DRAM capacity (such as DDR4, LPDDR4X) towards high-end products like DDR5 and HBM to enhance profitability. In April 2025, overseas manufacturers successively announced the cessation of DDR4 and LPDDR4X production. Although some capacity will be retained due to downstream long-tail demand, the supply-demand balance has tilted towards sellers.
- High-End Demand Support: The ASIC clusters (such as Google TPU) have a strong demand for high-end DRAM like DDR5 and HBM, coupled with the squeeze on HBM capacity, leading to tight supply of DDR5 and LPDDR5X, pushing the entire DRAM market into a comprehensive price increase cycle. CFM flash memory market data shows that by the third quarter of 2025, the DRAM price index has risen by 72% compared to six months ago, with DDR4 and LPDDR4X becoming the main drivers of price increases due to supply gaps, and the increase is expected to continue until the end of the year. The profitability of original manufacturers has significantly improved, forming a dual benefit pattern of “old processes out of stock and price increases, new processes leading the way”.
NAND: Profit Recovery and Enterprise-Level Demand Rebound Driving Price IncreasesCompared to DRAM, NAND price increases are more characterized by “catch-up”; however, the enterprise-level demand driven by ASIC has become an important support:
- Profit Recovery Demands: In the first half of 2025, although overseas manufacturers strictly controlled capacity, supply remained ample, leading to a continuous decline in NAND prices in the second quarter, dragging down corporate performance—SanDisk reported losses in the first quarter due to falling volume and price, and while it turned a profit in the second quarter, net profit was not as high as the previous year; Kioxia’s operating profit margin fell by more than half year-on-year. To restore profits, original manufacturers have a strong demand for price increases.
- Demand Side Support: The AI servers and data center construction driven by ASIC have led to a surge in enterprise-level SSD demand; in the North American market, due to a shortage of HDDs in data centers, some demand has shifted to enterprise-level SSDs, further increasing the demand for server NAND. Original manufacturers are prioritizing the fulfillment of North American customers, who have a higher acceptance of price increases, which is squeezing domestic supply. It is expected that server NAND prices will see single-digit increases in the fourth quarter. Against this backdrop, SanDisk sounded the “first shot” for NAND price increases in the third quarter of 2025, announcing a price increase of over 10%. Industry forecasts suggest that other manufacturers will follow suit, driving a general increase in NAND prices in the fourth quarter, laying the groundwork for the spring market in 2026.
Cycle Restructuring: AI Demand Breaking Traditional PatternsDespite the hot price increase trend in the storage market, the “recovery” does not mean a comprehensive rebound in demand, but rather highlights structural contradictions: high-end storage (HBM, enterprise-level SSD) demand driven by ASIC is surging (with HBM shipments expected to grow by 65% year-on-year in 2025), while the consumer electronics market is sluggish (with global smartphone shipments expected to grow by only 1% and laptop shipments declining), leading to a pattern of “high-end heat and low-end coolness.” This structural differentiation breaks the past 30 years of cyclical pattern of “overcapacity—price decline—production cuts to balance—price recovery”: the market, which should have entered a downward cycle in 2024, unexpectedly rebounded in 2025 due to AI (including ASIC) demand and production control strategies; the price fluctuation range also far exceeds historical levels—DDR5-4800 memory chips have seen a 75% increase over six months, and HBM has increased by 80%, breaking through the upper limits of traditional cyclical fluctuations. Experts predict that short-term price increases may continue until the end of 2025, and in the first quarter of 2026, the market may enter an adjustment phase due to sluggish consumer electronics and the release of mid-to-low-end capacity, placing the storage industry at a crossroads of “cycle restructuring.” In 2025, the rise of ASIC and the price surge in the storage market resonate sharply, collectively pointing to an AI-driven industrial transformation. As the core of the second half of the computing power revolution, ASIC not only welcomes a high prosperity cycle but also drives incremental opportunities in industry chain links such as OCS, RISC-V, and new packaging; while the price surge in the storage market is the result of the joint action of original manufacturers’ profit recovery and high-end demand from ASIC, traditional cyclical patterns are gradually being restructured. For the industry chain, this not only signifies short-term market opportunities but also indicates that a new competitive era of “high-end supremacy and scenario differentiation” has already arrived. Grasping the main line of ASIC and the structural opportunities in the storage market will be key to future layouts.
