Author: DOIT Media Xie Shicheng
Solid State Drives (SSDs) are continuously capturing the storage market due to their advantages of fast read speeds, low power consumption, and high data security. In particular, enterprise SSDs (eSSDs) appear to be safe and worry-free due to stringent quality control and multi-level power loss protection in data centers. However, unexpected power outages that prevent data from being written to the SSD in time, or frequent hot-swapping that generates instantaneous high voltage and surge currents, can still lead to data loss, causing significant losses for industries reliant on data centers such as AI, finance, telecommunications, and the internet.
As a long-time player in the power loss protection (PLP) field and the first supplier to provide integrated PLP functionality in PMIC solutions, Qorvo leverages its technological and experiential advantages to help customers eliminate these concerns.
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Surging Demand for AI Applications, Qorvo Stands Out in the PLP Field
With the explosive growth of AI technology, global data centers are accelerating their evolution towards large-scale, high-performance operations, with data center sizes expanding exponentially. Relevant data shows that global AI server shipments are expected to grow by 46% year-on-year in 2024, with a market size exceeding $187 billion, accounting for 65% of the total server market. By the end of this year, the global AI server market is expected to reach $298 billion, accounting for over 70% of the entire server market.
The rapid growth of AI servers is driving the demand for eSSDs to rise at an astonishing rate, with a single server potentially requiring thousands of eSSDs. According to TrendForce, the procurement capacity for AI-related SSDs will exceed 45EB in 2024, and in the coming years, AI servers are expected to drive an average annual growth rate of over 60% in SSD demand.
Qorvo Application Manager Zhang Junyue
“If every SSD is paired with a PMIC for power loss protection to safeguard data integrity, it signifies a massive market. This also provides Qorvo with vast development space in the AI data center field.” According to Qorvo Application Manager Zhang Junyue, “Our solutions offer comprehensive protection features. On the software side, when abnormal input/output voltage or temperature exceeds limits is detected, there will be warnings or error status registers for the main control to access, or it can inform the main control via GPIO in an interrupt form to issue relevant protection system commands. On the hardware side, when such issues are detected, the system will immediately cut off the power supply, protecting the chip itself and preventing downstream devices from being affected by faults. Additionally, abnormal input or eFUSE overcurrent will trigger PLP backup power to ensure the system has enough time to back up data.”
Qorvo’s Power Loss Protection Principles and Solution Advantages
Qorvo’s PLP technology charges the energy storage capacitor when the input is normal, and after the input energy is lost, the stored energy takes over the circuit within milliseconds to maintain operation, providing sufficient time for the SSD controller and cache to back up data and ensure data integrity.
Traditional discrete component-based SSDs require independent power supplies for flash memory chips, DRAM, controllers, and capacitors, along with a PLP protection chip, resulting in at least five power supplies. This, combined with numerous peripheral components, demands high board space, compresses storage chip area, affects data storage density, increases procurement management difficulty, quality control risks, and costs.
Qorvo integrates PLP functionality into the power management IC (PMIC), achieving significant results:
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Provides general-purpose input/output (GPIO) interfaces, making it easier to manage chip timing, voltage, and other functions. Additionally, if the system or chip detects any over-temperature, over-current, or over-voltage error messages, it sends them to the main control via GPIO as interrupt signals to prevent subsequent failures.
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Utilizes the I2C communication protocol to operate registers, allowing real-time editing of timing and precise control of each circuit’s delay, meeting the startup and power-off timing requirements of DRAM modules, which is difficult to achieve with discrete components.
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Significantly reduces development time, as customers can easily modify voltage, current, timing, GPIO, and other functions by simply re-editing our integrated circuit (IC) default functions and retesting. Discrete solutions typically require layout changes to test these system-level modifications.
Clearly, the PMIC solution with integrated PLP functionality optimizes the layout of peripheral devices, reduces the number of components, enhances engineers’ design and debugging efficiency, simplifies component quality control and procurement management, frees up DRAM chip storage space, and increases storage density. Zhang Junyue stated, “Qorvo has been deeply involved in highly integrated solutions for 15 years, accumulating relevant technologies that promote miniaturized design and integration, leading the industry.”
Two Models: ACT85411 and ACT85611 Architecture
Qorvo’s integrated PLP PMIC solutions include two models: ACT85411 and ACT85611, which are Qorvo’s first generation of integrated PLP products. Zhang Junyue pointed out that Qorvo has proactively defined these two leading products based on market demands for miniaturization and increased storage density, becoming the first company in the industry to provide integrated PLP and PMIC solutions.
The functional block in the center of the display shows all resources. The back-to-back eFuse switches above are used for surge limiting and front-end circuit protection during hot-swapping applications for eSSDs. Zhang Junyue emphasized that hot-swapping is essential for eSSD applications, as replacing SSDs in numerous cabinets and servers in data centers generates instantaneous high voltage and surge currents.
Qorvo’s eFuse intelligently controls the soft-start slope to keep surge currents within reasonable limits, protecting the chip and downstream devices.
On the left is the PLP circuit section, which stores input energy in the capacitor during normal operation, and after the input power is lost, the stored energy is immediately discharged to maintain operation. Below is the GPIO port, providing rich GPIO resources to configure various modes. The right side corresponds to the PMIC section, including DCDC circuits, such as Buck step-down or Boost step-up, to power the downstream Flash and I/O.
ACT85611 includes four efficient step-down regulators (three 4A and one 2A), with an output voltage range of 0.6-5.26V; a low-current step-down regulator (BuckVCC) for internal circuits and external loads (up to 100mA); a low-dropout linear power supply chip (LDO) supporting 300mA with an adjustable output voltage range of 0.6-3.75V; and a step-up regulator providing 10.8-13.2V output at 1A.
ACT85411 features two 10A step-down regulators with an output voltage range of 0.6-5.26V; a fixed low-current step-down regulator for internal and external loads (up to 200mA) at 5V; and a step-up/down regulator with an output voltage range of 9.6-16V at 1A.
These two products are specifically designed for eSSD applications. However, due to their excellent programmability and flexibility, they contain numerous configurable registers that can be applied to other fields requiring PLP functionality, such as virtual reality head-mounted displays, medical devices, and industrial control.
Leading Advantages of Integrated PLP PMIC Solutions
The integrated PLP circuit ensures rapid backup power supply to the system at the moment of power loss, maintaining brief system operation and ensuring complete data backup; the hot-swapping protection function effectively addresses the instantaneous high voltage and surge currents caused by frequent plugging and unplugging operations in data centers, protecting chips and downstream devices, which is particularly advantageous in AI data center applications. Zhang Junyue enumerated several advantages of the integrated PLP PMIC solutions.
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High Integration: Qorvo integrates multiple functions into a small chip, eliminating dozens of discrete components on the circuit board, significantly reducing the bill of materials (BOM) item count and lowering costs.
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High Reliability: Integrated capacitor health monitoring functionality allows real-time monitoring of capacitor health, providing timely replacement reminders and improving system reliability.
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Leading Capacitor Capacity Measurement Accuracy: Improved measurement accuracy reduces the number of storage capacitors used, saving costs, especially against the backdrop of high prices for high-voltage storage capacitors.
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Multiple Configurable GPIO Ports: Configurable system reset and communication between the main control, interrupt output error messages, and debugging output voltage and timing, making the chip easy to apply to different SSDs without additional board changes or component replacements.
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Optimized Dynamic Response Performance: Optimizes the dynamic response performance of power rails supplying SoCs, maintaining stable voltage during high data throughput, indirectly enhancing data transfer rates.
ACT85411 and ACT85611 have already been mass-produced and recognized in the market. Users can order through Qorvo’s distributors or e-commerce channels such as Mouser, RFMW, and Digikey, ensuring the safe operation of various AI data centers.
Currently, Qorvo has established partnerships with several leading SSD manufacturers, and the products have performed excellently in practical applications, receiving positive feedback from customers.
It is worth mentioning that Qorvo not only provides chips but also offers a complete set of support based on chip applications, including data manuals, evaluation board user manuals, and software GUIs and programmers that accompany the evaluation boards, assisting engineers in the design process and accelerating customers’ products to market.
Technical Expansion: From SSD Field to Multi-Industry Applications
SSDs are a widely applicable and market-potential flash storage technology. The PMIC solution with integrated PLP not only excels in the eSSD field but can also be applied to other areas requiring power loss protection functionality through simple programming edits. Qorvo collaborates with data storage solution providers in the data center industry chain to offer design solutions around edge computing, network connection ports, optical module products, and more.
In the future, Qorvo will continue to monitor the storage market, actively follow new user demands, and maintain its position as an industry leader.