As a software engineer, do you have the following confusions:
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The software crashed, and it turned out to be a CPU-related issue, but I don’t know where to start;
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Memory access errors, and I don’t know how to check page table attributes;
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When configuring GIC, I can’t distinguish between group0/1, secure/non-secure, fiq/irq;
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The company has an expensive ARM debugger, but I don’t know what it can be used for.
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Thousands of pages of ARM architecture manuals and ARM CPU manuals are like ancient texts; …
Don’t be discouraged by the above problems; countless people have stumbled here. This difficult path, we will walk with you.
As mentioned by Left Ear Mouse in “Programmer Leveling Guide (2018)”, a professional programmer needs to learn systematic knowledge including: architecture, operating systems, and network protocols.
Currently, mainstream architectures include x86, ARM, RISC-V, etc. x86 has too many historical burdens and is overly complex; while RISC-V is developing rapidly, it currently only has practical applications in the MCU field, and it will take time to compete comprehensively with ARM. According to data provided by ARM, ARM CPUs account for nearly 30% of the entire infrastructure field (as shown in the figure below).
The course “Master ARM Architecture in 8 Hours” starts with ARM CPU architecture, covering ARM instruction sets, memory management, and ARM CPUs, from single-core to multi-core; it closely follows the ARM CPU manual (TRM) and system architecture manual (ARM ARM/ARMv8), explaining 32-bit and 64-bit ARM CPUs from simple to complex.
This course can be learned sequentially to enhance your understanding of ARM CPUs or you can study specific chapters for specific issues. Each chapter has assignments that can be discussed in the course WeChat group, where multiple ARM experts are available for long-term Q&A. By studying this ARM architecture course, you can solve specific ARM CPU issues encountered in your work and learn other architectures through analogy, laying a solid foundation for your software technology stack.
No ARM development board is required; you only need a computer that can run Linux or Docker to complete all experiments and assignments in this course.
Instructor
Zhang Jian_Bamvor
With ten years of IT infrastructure research and development experience, including six years of frontline R&D experience in Linux kernel, working in companies such as SUSE, Huawei (2017), and Starry Bit (Technical Partner).
As a core team member, participated in the development of the first Cortex-A8 SOC chip in mainland China, responsible for CPU software verification, operating system porting, and other tasks.
As a technical expert sent by Huawei to Linaro, led/participated in the development of multiple Linux and ARM architecture-related features (ILP32, continuous bit hint, kernel self-test, etc.)
Delivered technical presentations multiple times in Las Vegas, Berlin, Budapest, and Beijing:
2014 OpenSUSE Asia Summit: openSUSE on ARM
2016 LinuxCon Europe: An efficient unit test and fuzz tools for kernel/libc porting
2016 Linaro Connect Las Vegas: LAS16-TR07: Working upstream [Mandarin]
2017 Linaro Connect Budapest: BUD17-305 – Implement contiguous page hint for anonymous page in user space. Slides
2018 Recent Kernel Update (Ubuntu Kylin 18.04 meetup in Beijing). Slides
Course Overall Outline
Overall Goal: Highlight ARM architecture content, and avoid discussing Linux content unless necessary. Approach: Start from ARM CPU architecture, covering ARM instruction sets, memory management, and ARM CPUs, from single-core to multi-core.
Using ARM architecture with Linux as an example, the following content is covered, with the goal of knowing where to check for ARM issues, PCB, SOC, ARM CPU, or ARM ARM:
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Instruction set: The kernel mainly uses integers; floating-point is briefly mentioned with lazy restore;
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Exception model: Focus on the kernel and user space; EL2 and EL3 are not mentioned;
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Memory: Differences between 32 and 64 bits.
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MMU
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Cache: PoU, PoC
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Timer
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GIC
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Power on and reset: ARM and SOC view.
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Coresight
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Debug
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Trace
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MCU can start from the differences with the A series; this part may require a hardware debugger, and briefly mention ARM Coresight.
