This is the beginning part of the article, starting to summarize the SoC development skills based on the ARMv7 series CPUs. A rough summary has been compiled, and the following mind map will be gradually improved. 
To put it simply: Compared to the general ARMv7-A/R, the ARMv7-M architecture represented by STM32F has the following key differences and highlights:
No MMU, but has MPU: The STM32F series does not have a Memory Management Unit (MMU), so it cannot run complex operating systems like Linux that require virtual memory management. However, it can have a Memory Protection Unit (MPU) to protect memory space between tasks in an RTOS (like FreeRTOS) to prevent erroneous access.
Highly integrated NVIC: The Nested Vectored Interrupt Controller (NVIC) is a major highlight of the Cortex-M core, integrated within the CPU. All configurations related to interrupts (priority, enable, query status) are done efficiently and uniformly by accessing the memory-mapped registers of the NVIC. This is the core of interrupt programming in STM32.
System Control Block (SCB): This is the module that controls the core functions of the CPU. For STM32 developers, the most commonly used is the SCB->VTOR register to redefine the vector table address (which is very useful during IAP upgrades or when running an OS).
Development mode: You will almost never develop an entire STM32 project purely in assembly. Typically, it is written in C, with assembly used only in the startup file (.s) for the most basic stack initialization, vector table definition, and clock initialization jump. Understanding assembly is for better debugging and optimization.
Core practice: Learning STM32F, after mastering the above architectural knowledge, the real practice lies in:
Understanding the startup process: What happens from the assembly startup file to the main() function. Mastering the interrupt mechanism: How to write interrupt service functions and configure the NVIC. Proficiently operating peripherals: Essentially reading and writing to those defined memory addresses (registers). Using CMSIS: This is a hardware abstraction layer standard established by ARM, and the libraries provided by ST (STMicroelectronics) are based on this. It defines a standard way to access core registers like NVIC and SCB, allowing your code to be portable across different Cortex-M vendors' chips.In summary: Learning the ARMv7-M architecture of STM32F focuses onunderstanding the interrupt mechanism (NVIC), mastering memory mapping (knowing where the peripheral registers are), configuring core functions (SCB), mastering the startup process, understanding program execution principles, and mastering chip configuration techniques, ultimately controlling the entire chip efficiently through C language and standard libraries.
