The automotive industry is transitioning from traditional vehicles to software-defined vehicles (SDV). Software-defined means shifting traditional hardware-dependent tasks to software, enabling more flexible, programmable, and automated solutions. By 2030, software is expected to account for 50% of the value of new cars.
For consumers, the biggest benefits of software-defined vehicles will be higher safety, convenience, and performance—along with an ever-improving driving experience. For manufacturers, the greatest advantage of software-defined vehicles will be the ability to build closer relationships with drivers throughout the vehicle’s lifecycle, achieving differentiation in brand driving and experience.
The most intuitive experience is that as the digital core of the system, the MCU will undergo significant innovation to adapt to the future of software-defined vehicles, with the key being the transition from domain architecture to zone architecture.
Today, the iteration cycles of software and hardware are different, and software iterations are becoming increasingly rapid; the traditional development model can no longer wait for hardware updates. The design of zone architecture can promote the decoupling of software and hardware, advancing the standardization and generalization of sensors and actuators, allowing for reuse across multiple platform models, while the software on the central computing platform can iterate independently of hardware to meet the rapid development needs of software-defined vehicle functionalities.
Moreover, zone architecture can also reduce the number of ECUs and the length of wiring harnesses. This hardware convenience reduces the complexity of the vehicle’s electrical architecture and design verification cycle. Zone architecture will give OEMs dominant control over high-level software on the central computing platform, including OTA (Over-the-air), FOTA (Firmware-over-the-air), as well as vehicle networking and autonomous driving, facilitating OEMs’ transformation towards a service-oriented architecture (SOA).
These evolutions and challenges will bring significant adjustments to MCU development, not only in domain control but also posing challenges in areas such as gateways and nodes, from latency to security, from processing to scalability, requiring innovations in all aspects.
Infineon: Comprehensive Enhancement of AURIX TC4
Infineon’s AURIX TC4 can be said to be a comprehensive MCU suitable for the next generation of eMobility, ADAS, automotive E/E architecture, and artificial intelligence (AI).
AURIX TriCore integrates a RISC processor core, a microcontroller, and a DSP within a single MCU. Products based on TriCore are widely used in automotive applications, including internal combustion engine control, pure electric and hybrid vehicles, transmission control units, chassis domains, braking systems, electric steering systems, airbags, networking, and advanced driver assistance systems, driving the development of automation, electrification, and connectivity.
Based on a scalable series concept, TC4x can provide up to 6 lock-step (LS) TriCore1.8 cores, synchronously operating at a maximum frequency of 500 MHz, resulting in a leap in TC4x performance. Configurable with different sizes of NVM to meet various application requirements, and supports zero downtime SOTA.
The on-chip integrated parallel processing unit (PPU; vector DSP co-processor) significantly reduces the computation time required for complex model-based algorithms, achieving edge AI that meets ASIL-D safety level requirements. The newly added converter-based digital signal processing (cDSP) filters enable flexible digital processing of ADC signals.
TC4x’s real-time control capabilities benefit from its enhanced timers (eGTM), high-resolution PWM, and optimized ADC, with communication facilitated via the existing low-latency interconnect bus (LLI). AURIXTM TC4x will comply with the latest information security ISO/SAE 21434 and functional safety ISO 26262 standards. This cutting-edge safety concept addresses performance bottlenecks in fast secure communication and supports post-quantum encryption processing. Quantum attacks pose a threat to current encryption methods, while TC4x enhances protection against quantum computer attacks. Virtual machine management software and virtual machines ensure secure isolation of multiple software applications, preventing interference between them (FFI).
Finally, thanks to the data routing engine (DRE) and high-speed communication interfaces such as 5Gbps Ethernet, PCIe, 10BASE-T1S Ethernet, and CANXL, TC4x’s extensive and scalable connectivity capabilities also provide room for further upgrades in automotive E/E architecture.
Additionally, Infineon has multiple MCUs used in automotive applications.
Auto PSoC – a programmable system-on-chip, integrates Infineon’s leading capacitive sensing technology, suitable for strictly demanding HMI applications inside vehicles as well as external applications such as battery management systems (BMS), and includes ARM Cortex-M0/M0+ CPU, flash memory, and RAM. The programmable analog front end features ADC, operational amplifiers, low-power comparators, and digital modules with various communication interfaces (such as SENT, LIN, CAN, and CAN FD), providing a highly integrated, space-efficient single-chip smart sensor.
TRAVEO T2G is suitable for automotive body electronics and dashboard applications. This series of microcontrollers is built into a single Arm Cortex-M4F and dual Cortex-M7F, offering strong processing power and network connectivity, with performance in Traveo T2G reaching up to 1500 DMIPS. This series also offers scalability across memory sizes and pin counts. IP compatibility allows customers to design and develop their systems using a single platform MCU solution. Traveo T2G devices feature advanced security functions, introducing HSM (hardware security module), dedicated Cortex-M0+ for secure processing, and embedded flash memory with dual storage mode to meet firmware over-the-air (FOTA) requirements.
NXP: CoreRide Platform
In response to software-defined vehicles, NXP directly launched a platform called S32 CoreRide, which not only gathers NXP’s mature S32 computing, networking, and system power management technologies but also integrates immediately deployable software from NXP’s extensive software ecosystem partners, including middleware, operating systems, and other software. The NXP CoreRide platform optimizes integration processes, enhances scalability, and eliminates cumbersome obstacles in development.
NXP’s automotive platform has been fully transitioned to S32, covering S32N from 90nm to the latest 5nm.
The S32N processor is equipped with advanced hardware security engines and multi-port Ethernet switches, while providing Ethernet packet acceleration, AI/ML acceleration, and cost-effective PCI Express compute intercommunication services. The S32N55 processor excels in safety, centralized, real-time automotive control, which requires high-performance, deterministic computing capabilities to support the highest levels of functional safety. Through software-defined hardware forced isolation, the S32N55 can carry dozens of automotive functions with varying levels of importance while avoiding interference between different functions.
Core automotive functions such as powertrain, chassis control, body, and others have been implemented as independent electronic control units (ECUs), each with its own microcontroller and wiring. Now, multiple automotive functions can be safely integrated into the S32N55 processor with multiple isolated execution environments, breaking through the SDV integration barriers.
Renesas: Introducing Chiplet into Automotive Processors
Renesas currently has a comprehensive automotive-grade MCU portfolio covering various applications. To clarify, the recent speculation about Renesas exiting the RH850 market is unfounded; in fact, Renesas has always used RH850 as its main product for regional/domain microcontrollers, and it has extended into multiple fields, with a roadmap for product evolution.
Notably, this November, Renesas and Nidec will be the first globally to launch an “8-in-1” proof of concept (PoC) solution for electric vehicle (EV) drive motor systems (E-Axle)—controlling eight functions with a single microcontroller (MCU), utilizing Renesas’ RH850/U2B.
In addition to Nidec’s motors and gears, the functions in this PoC also include Renesas’ inverter (output power 70 to 100 kW, with efficiency up to 99% or higher), 1.5kW DC/DC converter, 6.6kW OBC, power distribution unit (PDU), battery management system (BMS), and automotive PTC heating controller.
However, significant changes will occur in Renesas’ fifth-generation R-Car product family, all built around Arm core-based computing engines, including high-performance 64-bit SoCs, 32-bit cross-domain MCUs, and 16-bit MCUs with superior performance compared to peers. According to Renesas’ plan, “more 32-bit MCUs based on Arm cores will be introduced, featuring GHz-level real-time throughput, quick startup performance, and embedded non-volatile memory to manage electronic control modules for domain and regional control applications. Additionally, these products will include an expanded ‘cross-domain’ option to bridge the performance gap between SoCs and traditional 32-bit MCUs.”
Renesas recently launched the R-Car X5 series, which can support multiple automotive functional domains simultaneously with a single chip, including advanced driver assistance systems (ADAS), in-vehicle infotainment systems (IVI), and gateway applications. The highly anticipated R-Car X5H SoC, as the first product in the R-Car X5 series, adopts advanced 3nm automotive-grade technology, featuring high integration and outstanding performance, pushing OEMs and Tier 1 suppliers towards centralized electronic control units (ECUs), simplifying development processes, and creating future-oriented system solutions. Thanks to its unique hardware isolation technology, the Renesas R-Car X5H SoC has become one of the industry’s first solutions to achieve highly integrated and secure processing for multiple in-vehicle functional domains on a single chip. Additionally, this new SoC also provides options for extending AI and graphics processing capabilities through Chiplet technology.
Car X5H directly addresses the increasing complexity challenges in software-defined vehicle (SDV) development, overcoming related challenges including optimizing computing performance, power consumption, cost, and hardware-software integration while ensuring vehicle safety. By closely integrating application processing, real-time processing, GPU and AI computing, large display capabilities, and sensor connectivity functions on a single chip, applications such as autonomous driving, IVI, and gateways are elevated to a new level.
The new SoC series achieves AI computing power of up to 400 TOPS and industry-leading TOPS/W performance, while supporting GPU processing capabilities of up to 4 TFLOPS. It features a total of 32 Arm Cortex-A720AE CPU cores for application processing, providing over 1,000K DMIPS of CPU computing power. The product is also equipped with 6 Arm Cortex-R52 dual-lock-step CPU cores, achieving over 60K DMIPS of performance without the need for external microcontrollers (MCUs) to support ASIL D functionality. This series of SoCs is manufactured using one of TSMC’s most advanced process nodes, achieving higher CPU performance while reducing power consumption by 30-35% compared to products designed with 5nm process nodes.
STMicroelectronics: Two Pillars of Stellar and STM32A
ST will simultaneously develop two pillars applied in automotive MCUs.
ST’s latest generation of automotive microcontrollers is the Stellar series, covering the entire automotive MCU field from low-end to high-end solutions. These advanced microcontrollers reduce complexity, ensure safety, and provide optimal performance and efficiency for next-generation automotive architectures and functionalities. Customers can benefit from shorter development times and focus on bringing innovation and differentiation to their software-defined vehicles (SDV) in this competitive market. The Stellar series is optimized for electrification, including X-in-1 vehicle motion control computing, new vehicle architectures, partitioning and domains, and safety MCUs for safety-critical subsystems such as ADAS.
Stellar fully supports automotive transformation by integrating multiple functions safely into a single device and allowing for continuous integration of new functionalities into vehicles. This is made possible by the selection of several key technologies within Stellar, including core technology, virtualization, Ethernet support, and memory.
The Stellar MCU is based on Arm Cortex-R52+ technology. This high-performance processor provides real-time virtualization support for time-critical safety systems. It can run multiple applications simultaneously without interference. Additionally, due to the fully programmable auxiliary core, specific functions such as routing, low-power management, and digital filtering can be accelerated while offloading the main core.
Stellar P is designed for integrating multiple functionalities, while Stellar G is used for implementing software-defined vehicle (SDV) regional controllers; both series utilize ST’s internally developed eNVM. They are built on 28nm FD-SOI technology, enabling them to achieve maximum frequency with lower power consumption and enhanced radiation resistance.
The Stellar MCU features embedded phase-change memory (PCM) technology and its flexibility, revolutionizing the OTA process. In the automotive industry, OTA updates are crucial for adding new functionalities and security patches without physical intervention. However, this flexibility often requires careful consideration of future memory needs, which can lead to increased costs and complex planning.
ST’s PCM innovation is not just an ordinary memory. It is not only the industry’s smallest automotive MCU memory unit but also heralds a transformative breakthrough in the automotive field, redefining the possibilities of automotive software.
Additionally, PCM supports uninterrupted OTA updates. PCM can securely store updates without affecting the vehicle’s current operation. Thanks to its concurrent read and write capabilities, new software downloads do not interfere with the application code already running on the MCU, ensuring continuous performance during the update process.
STM32A extends the widely recognized cost optimization, simplicity, and reliability of popular general-purpose MCUs to automotive-grade, achieving ASIL B standards. This platform is designed to handle edge-driven applications, from the simplest functions to more complex single tasks, all accomplished at optimized costs. It will be particularly suitable for applications such as motor control in automotive systems, including windows, mirrors, and roofs.
Texas Instruments: Meeting Diverse Needs
Texas Instruments states that integrating different logic I/O functions (including control loops) within a single area module means that the module must meet various requirements for each I/O function, resulting in specific requirements for these MCUs.
• High real-time performance
• Large amounts of program and data memory
• Mixed criticality support for functions with different automotive safety integrity levels through virtualization
• High-speed communication interfaces oriented towards the backbone
• Multiple instances of low-end communication peripherals (such as CAN FD or LIN) for connecting intelligent sensors and actuators
To meet these diverse requirements, MCUs need to support the demands of area module driving. Meanwhile, TI offers heterogeneous SoCs with sufficient real-time capabilities, such as DRA821 or AM2x embedded processors, which can bridge this gap before optimized area MCUs are launched.
Additionally, TI recently introduced a 64-bit C29x core, enhancing the commonly used C2000 in automotive motor and power control systems to 64-bit. Innovations in the C29 core include:
The recently launched AEC-Q100 certified MSPM0 is also applied to edge-driven applications, supplementing the node coverage of zone architecture.
The AEC-Q100 certified MSPM0 can be applied in areas such as window and door controls, seat heating, onboard chargers, and display rotation control.
Microchip: New dsPIC33A Core
Microchip has launched a new core for its dsPIC digital signal controller series this year, with the dsPIC33A series featuring an advanced core architecture with 32-bit CPU running at 200 MHz, including double-precision floating-point units and DSP instructions, suitable for many numerically intensive tasks in closed-loop control algorithms.
The dsPIC33A DSC has been optimized for improved mathematical and data processing capabilities, higher code efficiency, faster context switching, and shorter latencies. This lower latency accelerates the response to transient and safety-critical events. New peripherals and upgraded peripherals (such as high-resolution PWM designed for motor control and digital power conversion) are aimed at supporting progressive technology development across various markets, including automotive, industrial, consumer, electric mobility, data centers, and sustainable solutions.
The dsPIC33A device series features flash memory security functions, including immutable trust roots, secure debugging, and restricted memory access. The instruction set architecture (ISA) of the DSC supports software code generation based on model-based design, simplifying code generation. The dsPIC33A DSC is fully featured and highly suitable for applications requiring efficient motor control for fans, pumps, and compressors; they can also manage digital power conversion for AI servers and electric vehicle onboard chargers, as well as sensor interfaces for industrial and automotive applications.
Conclusion
The foundation of software-defined vehicles is zone architecture, which requires new solutions to overcome challenges in distribution, sensors, actuators, and data communication, with processors being a key element.
Solutions will not emerge all at once, but will evolve continuously, introducing changes as opportunities mature, minimizing risks associated with premature launches.
Body domains and their many distributed actuators and sensor ECUs will be among the first to transition to zone architecture, ideally combining standardized components of sensors, actuators, zone modules, and data links. This presents a significant challenge for automotive MCU manufacturers.
Even after the decoupling of hardware and software, the development model for automotive MCUs will change. We have also seen innovations from several major MCU manufacturers this year, whether in higher performance, greater safety, a richer product portfolio and roadmap, and more comprehensive development documentation, even introducing more popular virtual development methods, all aimed at accelerating the development of zone architecture.
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