Recently, according to the latest data released by Siemens on EDA tools, the chip industry is facing unprecedented technical challenges: the success rate of first tape-outs is plummeting to a historical low of 14% in 2025, a sharp decline from 24% two years ago—this means that eight out of ten chip design companies will fail during their first tape-out. In this industry predicament,Xiaomi’s successful tape-out of the Xuanjie O1 chip is even more precious. This breakthrough not only reflects technical capabilities but also reveals the path for domestic chips to break through in a complex international environment.
Industry’s Darkest Hour: The Brutal Reality of Falling Tape-out Success Rates
In 2025, the global chip industry is trapped in a “chip tape-out winter”:
The success rate of first tape-outs has plummeted to 14% (down from 24% two years ago), with only 1-2 out of 10 companies succeeding on the first try;
The cost of failure is severe: a single tape-out can result in losses of tens of millions, putting small and medium design companies at risk of survival.
Deep-rooted Dilemmas:
Technical complexity is skyrocketing: 3nm processes integrate 19 billion transistors, and the demand for AI computing power is pushing design limits;
Verification cycles are out of control: the time for custom design verification has surged, while market windows continue to compress;
Cost death spiral: the cost of advanced process tape-outs has skyrocketed, and failing companies are trapped in a vicious cycle of “the more tape-outs, the more losses”.
Breaking the Deadlock: How Did Xiaomi Conquer the “Impossible Task”?
Technical Strategy: Clever Use of “Mature IP Combinations”
Outsourcing CPU/GPU to reduce risks: adopting Arm’s public architecture (X925 CPU + Immortalis-G925 GPU) to avoid the high-risk black hole of self-developed architectures;
Focusing on backend optimization: concentrating self-developed efforts on controllable aspects such as multi-core scheduling and physical design to improve energy efficiency (GPU temperature lower than Apple’s);
Gradual technical path: starting from small modules like the Surge C1 imaging chip and P1 fast-charging chip, gradually accumulating SoC integration capabilities.
Resource Investment: A Billion-Level “Gambling-style Safeguard”
Financial barriers: a cumulative investment of 13.5 billion yuan, with a 6 billion yuan R&D budget in 2025 (exceeding the annual revenue of most domestic chip companies);
Talent density: a team of 2,500 people including core engineers from HiSilicon and Zheku, gathering top domestic chip design talent;
Supply chain binding: securing TSMC’s 3nm capacity in advance to avoid the “bottleneck” risk of wafer foundries.
Breakthrough Results: The “3nm Coming-of-Age Ceremony” for Domestic Chips
Performance benchmarks against international flagships: multi-core scores of 9509 surpassing Apple’s A18 Pro (8751), with GPU energy efficiency gap reduced to 35%;
Area control at its peak: 109mm² housing 19 billion transistors, reaching international first-tier levels;
Historical significance: the first commercially available 3nm mobile SoC in mainland China, breaking the monopoly of Apple/Qualcomm/MediaTek.
Thorns Under the Halo: Controversies and Survival Challenges
A Dialectical Examination of “Pseudo Self-Development” Criticism
Controversy focus: CPU/GPU/baseband all rely on purchased IP, with self-development concentrated on integration and optimization;
Industry reality: globally, except for Apple and Huawei, Qualcomm/MediaTek also purchase a large amount of IP (such as Arm architecture), and reasonable division of labor has become a trend;
Core value: under the hellish difficulty of a 14% success rate, the success of the first tape-out proves that the system-level design capability meets the standards.
Survival Challenges Under the Scale Paradox
Cost structure dilemma:
The comprehensive cost of a single Xuanjie O1 chip far exceeds that of industry flagship chips, reaching several times that of the latter;
Breakeven requires at least 5.5 million smartphone sales to support, while the Xiaomi 15 series sold only 4.539 million units (over 7 months), failing to reach the safety line.
Technical shortcomings amplify cost pressures:
The external baseband solution (provided by MediaTek) leads to additional power consumption and space occupation, directly increasing the overall cost;
If baseband integration cannot be achieved, the next generation of chips will face a vicious cycle of “high costs → low sales → more difficult to amortize R&D investment.”
Brutal reality: the current cost structure and sales scale form a sharp contradiction; if the technical integration bottleneck cannot be broken, the Xuanjie series may become a non-commercial technical specimen.
The Industry Beacon: The Three Paradigm Values of Xuanjie O1
Feasibility Verification of the Path
Proving that the “Fabless + IP Integration” model remains effective in the 3nm era, providing a low-risk breakthrough model for small and medium design companies;
Promoting domestic chips to leap from “28nm mid-to-low-end involution” to “advanced processes with high added value”.
Deepening Industry Chain Collaboration
Strengthening design-manufacturing division of labor: Xiaomi (Fabless) focuses on system integration, while TSMC (Foundry) ensures process implementation, breaking the resource shackles of “full-stack self-development”;
Forcing upgrades in domestic packaging, testing, and material support (such as Changdian Technology’s 3nm packaging technology).
Rebuilding Technical Confidence
After Huawei’s Kirin was constrained, the Xuanjie O1 marks a substantial recovery of the domestic high-end SoC R&D chain;
Attracting capital and talent back to the chip industry, reversing the short-term utilitarian tendency of “making chips is not as good as making cars.”
Conclusion: Breaking the Deadlock is Easy, Maintaining the Status Quo is Difficult
The success of the Xuanjie O1 tape-out is a milestone forged by precise strategy (IP combinations) + saturated investment (billion-level) + industry timing (3nm maturity). It announces to the industry:
The “14% success rate curse” can be broken—Chinese chips have the capability to climb the 3nm peak;
The real war has just begun—if the “cost barrier” (baseband integration/scale effect) and “self-development advancement barrier” (IP substitution) cannot be overcome, today’s breakthrough makers may become tomorrow’s tragic heroes.
Xiaomi’s ultimate test is also a microcosm of domestic chips: “Tape-out success is just getting the entry ticket; whether one can survive to the final circle depends on the perilous leap from ‘technical miracle’ to ‘commercial miracle.'”
Previous Reviews
ClickFengyun Network Video Account for the latest videos ▲
