The Arm Cortex-R52+ implements a Generic Timer that can generate interrupts and event streams based on an incrementing count.In fact, this timer is defined exactly the same as in Armv8-R AArch32, so all details should refer to the following documents:
《Arm® Architecture Reference Manual Supplement Armv8, for the Armv8-R AArch32 architecture profile》
《Arm® Architecture Reference Manual Armv8, for Armv8-A architecture profile》
So what is a Generic Timer?According to Arm’s documentation, the Generic Timer primarily provides a basic timer framework for Arm cores. This module includes one System Counter and a set of Timers for each PE, structured as follows:Generally, the System Counter is not implemented by the CPU but is instead implemented from the Always-Powered domain, as shown below:The System Counter simply increments monotonically and does not reflect real-world time. It distributes the count value to each PE’s Timer through the System Timer Bus. When this Timer’s configured comparison value is reached, it triggers the corresponding system event, sending it to the GIC (Interrupt Controller), which generates FIQ/IRQ for the kernel to respond. As shown in the figure below:
2. Generic Timer of R52+
Each core of the R52+ has a set of timers, which include:
One EL1 physical timer
One EL2 physical timer
One virtual timer
Each timer has a PPI (Private Peripheral Interrupts) provided to the core, which is also why we can use this timer for tick generation conveniently.There are three types of registers for the timers, which are:
CTL: Control register
CVAL: Comparator value register
TVAL: Timer value register
The above three types of registers have different prefixes for different timers, specifically:
CNTP: Counter-timer Physical Timer
CNTV: Counter-timer Virtual Timer
CNTHP: Counter-timer Hyp Physical Timer
So this table is clear; CNTP_CTL indicates the control register of the physical timer at EL1 level, and so on.
3. How to Configure Timer Interrupts
First, configure the timer to generate events, then configure it to generate interrupts.There are two ways to configure the timer:
Using the CVAL register: By writing certain values to the comparison register, once the System Counter is greater than or equal to this value, the corresponding event will be generated, as shown below:
Using the TVAL register: By writing certain values to the TVAL register, CVAL = TVAL + System Counter, once it is greater than or equal to this, the corresponding event will be generated, as shown below:
How to generate interrupts?By setting the CTL register, the bit fields are as follows:
ENABLE – Enable the timer
IMASK – Interrupt mask. Enable or suppress interrupt generation
ISTATUS – Whether the timer event is satisfied (CVAL <= System Count), must be used with ENABLE = 1
Therefore, generating an interrupt is easy: ENABLE = 1, IMASK = 0.We just need to register the interrupt function in the GIC to implement the Generic Timer’s interrupt.It is important to note that when handling this interrupt, software must clear the corresponding interrupt flag in the GIC; otherwise, the same interrupt will occur again.
4. Summary
No summary, just feel like useless knowledge has increased, haha.
Previous Reviews:
1. Selected Automotive Calibration
Automotive Calibration Technology – Detailed Explanation of Calibration ConceptsAutomotive Calibration Technology – The Past and Present of BypassLong Article: Automotive Calibration Technology – Overview of XCP
2. AUTOSAR Selected
AUTOSAR CryptoStack – What Does CSM Job Carry?AUTOSAR Diagnostics Stack Analysis (Part 1)AUTOSAR OS Overview (Part 1)
3. Automotive Cybersecurity Selected
Automotive Information Security – Common Password Algorithms for MCU StartupAutomotive Cybersecurity Solution Requirement AnalysisAutomotive Information Security – Common Automotive MCU Secure Boot SolutionsOverview of In-Vehicle Information Security Scenarios
4. Automotive Functional Safety Selected
Analysis of Functional Safety Mechanisms for TC3xx Startup
TC3xx SMU, PMIC, and Transceiver Functional Safety Closed-Loop Concept
5. Automotive Virtualization Selected
Introduction to Automotive ECU Virtualization Technology (Part 1)
Automotive ECU Virtualization Technology (Part 2) – U2A Virtualization Function
6. Miscellaneous
Analysis of Flash Simulation EEPROM Principles
Long Journey: The Story of Domestic Substitution of Automotive MCU
Application Scenarios of Automotive MCU and Progress of Domestic Substitution
