With the smartphone industry (corresponding to the Cortex-A series) becoming increasingly mature, the focus has gradually shifted to the fields of smart cars/smart robots. Among them, the safety level of chips in the automotive field is very high, in other words, the probability of problems with chips in cars is extremely low, far lower than that of smartphone chips. Problems with smartphones can be resolved by rebooting, while automotive chips in critical areas must not reboot during driving. Especially in the areas of automotive drive control and steering control, the entire system (from chips to software) must achieve an ASIL D level of functional safety, facing such a high threshold of safety requirements. The drive motors of smart robots are numerous and the scenarios are flexible, leading to a more complex motion control system with a larger amount of information to process, and under human-robot interaction scenarios, there must be sufficient safety protection mechanisms to avoid the robot mistakenly harming humans. Therefore, multi-core, high-performance, and safe chips can well match the needs of smart robots, which can be said to be very compatible with the current hot trend of embodied intelligence.
In response to this scenario and demand, ARM has launched the Cortex-R52/Cortex-R52+ CPU, which has functional safety and error detection mechanisms in terms of safety features, supporting the ASIL-D level requirements of ISO 26262.
With the development trends of smart cars, smart robots, and industrial intelligence, I believe the Cortex-R52 will shine like the Cortex-M3/4, becoming a star product in fields such as smart cars and smart robots.
There is simply too little information about Cortex-R52, unlike the M and A series, which already have plenty of mature materials. Recently, while learning about Cortex-R52, I organized some materials, and interested friends can click the link below (or click the original text at the end of the article) to check and obtain.