Introduction
This is a supplement to the previous technical introduction of SemiDrive’s high-performance automotive SoC platform. This part is relatively detailed in the entire video, covering four characteristics: Safe, Secure, Scalable, and Smart, which correspond to functional safety, information security, scalability, and intelligent applications.
01
Chip Core in the Computing Platform
As previously mentioned, the hardware architecture of the intelligent vehicle computing platform is built around high-performance CPU/GPU SoC chips. In the field of intelligent driving, SoC chips are required to support core algorithms such as environmental perception, positioning, and path decision planning. They also need to achieve high safety levels for vehicle control and in-vehicle communication, as well as implement fault monitoring and redundant control.
Figure 1 Core Domain Control of the Vehicle
The basic requirements differ from traditional in-vehicle chips, demanding powerful computing capabilities to meet performance and real-time requirements; compliance with ISO 26262 functional safety requirements; information security compliance; support for various in-vehicle communication protocols such as CANFD/Ethernet; support for FOTA upgrades to achieve functional iteration; compliance with automotive-grade standards and low power consumption requirements.
Figure 2 Chip Requirements for Major Modules
02
Key Points from the Video
As mentioned in the previous article, the X9 series chips are used to support future intelligent cockpits. The X9 chip can support multiple high-definition screens simultaneously, with functions such as voice interaction and gesture recognition, as well as driver status monitoring.
Figure 3 Application Block Diagram of X9
The V9 series chips are the core brain of autonomous driving: as the core of the domain controller, the V9 is equipped with a high-performance vision engine that supports up to 18 camera inputs.
Figure 4 Autonomous Driving Applications of V9
The G9 series chips are the intelligent information hub of future vehicles, with 20x CAN FD/16x LIN/2x Ethernet data packet processing engines, supporting national secret SM2/3/4/9 and C-V2X protocol acceleration.
Figure 5 Typical Applications of G9X as a Gateway
As shown in the figure below, the X9, V9, and G9 processors adopt a brand new SoC architecture, consisting of four important components: an independent Safety Island, an independent Hardware Security Module (HSM), a Scalable Application Processor that can be flexibly configured, and SemiDrive’s Smart Engines.
Figure 6 Overview of SemiDrive’s 4S
1) Safe Safety
This is a basic feature of the series of SoC chips, configured with an independent Safety Island, which includes dual-core lockstep safety processors and various safety mechanisms such as data error correction protection, covering the entire SoC. The diagnostic coverage rate on the chip’s core safety module even reaches 99%.
Figure 7 Overview of Safety
2) Secure Encryption
This feature is mainly reflected in the G9, which adopts a high-speed interconnect architecture, supporting CAN-FD, two Gigabit Ethernet, two PCIe 3.0, two USB 3.0, and 16 UART interfaces. It also integrates commercial secret SMx series algorithms and adds a second-generation hardware packet processing engine SDPEv2, accelerating real-time “forwarding”, “filtering”, and “blocking” of data packets between interfaces without occupying resources of the upper operating system and processor.
Figure 8 Information Security Overview
3) Scalable Scalability
Taking X9 as an example, it mainly includes a self-designed hardware virtualization acceleration unit DriveBoost, using ARM’s latest v8.2 architecture CPU core and Imagination’s 9th generation GPU. These components can be trimmed to support different screens, including dual-screen to eight-screen setups.
Figure 9 Scalability
Figure 10 Series of X9
Figure 11 Different Configuration Combinations of X9
4) Smart Intelligence
Taking the autonomous driving chip as an example, the V9 has multi-sensor fusion capabilities (16xCAN-FD, 16x FullHD Camera, 16x UART, 2xGbE, quad-core A55, 3D GPU, dual-core R5LS) and PCIe 3.0 computing power expansion capabilities of the domain control SoC, flexibly matching GPU, FPGA, NPU, and other PCIe interface AI computing units. Dedicated acceleration engines have been developed for several common application scenarios. For example, the CV engine can achieve high-performance image processing; the voice engine can realize voice wake-up functions without occupying CPU resources.
Figure 12 Key Features of Smart
Conclusion: You can refer to the video for more insights. Overall, regarding the design applications of multiple major domains in the electronic architecture for automotive intelligence, SemiDrive’s 9 series automotive-grade SoC design aligns with the trend and is indeed worth looking forward to.