Choosing Between General MCUs and Edge AI Chips: Arm or RISC-V?
The development of computing over the past 30 years can be roughly divided into three stages: in 1995, Microsoft Windows opened the PC era dominated by x86 architecture CPUs; in 2007, Apple’s iPhone ushered in the smartphone era led by Arm architecture; and in 2012, the success of the convolutional neural network AlexNet based on NVIDIA GPUs marked the beginning of the artificial intelligence (AI) era. After 10 years of rapid development, AI has expanded from the cloud to the edge and terminals, penetrating data centers, edge servers, 5G base stations, and a variety of smart terminals.RISC-V can support both customized ISA extensions and standard extensions, regardless of whether the application uses customized ISA extensions. (Image: Codasip)As Arm architecture processors expand from smartphones into emerging applications in IoT, automotive ADAS/autonomous driving, and various AI scenarios, the open and flexible RISC-V microprocessor architecture has also flourished. In increasingly more computing application designs, both Arm and RISC-V can be seen. Specifically, at the chip level, microcontrollers (MCUs) widely used in embedded computing and AI chips aimed at edge/terminal computing have become the main battleground for direct competition between Arm and RISC-V architecture microprocessor cores.Customizable Instruction Set (ISA)The RISC-V instruction set architecture has supported basic ISA, standard extensions, and customizable ISA extension instructions from the very beginning. Initially, Arm did not support customizable extensions, but under competitive pressure, it has started to open up customizable features to Arm ecosystem partners. Even the closed x86 ecosystem has begun to loosen, as Intel has recently started to consider external licensing, and customizable extensions may also be possible.Because RISC-V has no historical baggage like Arm and x86, its ISA is relatively simple in instruction planning. Extensions can be made based on specific application needs on top of the standard instruction set, providing great flexibility for various fragmented emerging applications. For example, the RISC-V vector extension (RVV) allows the processor core to accelerate single instruction stream computations on massive datasets, making it particularly suitable for tasks such as machine learning, image compression, data encryption, audio and video multimedia processing, speech recognition, and natural language processing. These are essential computing tasks for implementing AI in emerging IoT applications.Support for customizable extension instructions in RISC-V may be the key to success or failure in certain specific applications. Using customizable extension instructions does not conflict with its main ISA, allowing for simultaneous support of general RISC-V software.Codasip CTO Zdeněk PřikrylIn the above RISC-V software stack diagram, RISC-V processors with customizable ISA extensions can support real-time embedded operating systems (such as embOS, FreeRTOS, or RT-Thread) that require high real-time performance, as well as operating systems (such as Linux, Android, or Windows) that require high processing performance. App1 does not require performance enhancements and does not use customizable ISA extension instructions, only needing a standard compiler. In contrast, App2 and App3 use customizable ISA extensions to enhance performance, thus requiring compilers compatible with the customizable ISA extensions.Codasip is a European developer focusing on RISC-V and Domain-Specific Architecture (DSA) processor solutions. The company’s CTO Zdeněk Přikryl stated in an interview with Electronic Engineering Magazine that for any MCU manufacturer, whether based on RISC-V or Arm architecture, if a general-purpose design is adopted, there will inevitably be compromises in performance. AI typically requires high processing performance, while edge applications require low power consumption and small size MCUs. However, the reality is that general-purpose processor cores rarely meet these combined performance requirements. For some edge AI applications, adding custom instructions to the RISC-V processor core can enable algorithms to be fully executed within relatively limited processing resources. Customizable domain-specific architectures can make processors more suitable for AI algorithms and software workloads.Impact of Microprocessor Cores on PerformanceThe architecture of the processor core is a key factor affecting processor performance. Advanced architectures have more powerful instruction sets and superior computational units, thus possessing greater computing power. Moreover, under the same processor architecture, using different implementation technologies can also impact performance. For example, implementing CPU no-wait instruction access using bus concurrency architecture technology can improve computational performance by over 30% compared to processors of the same level.To assess MCU performance, two dimensions must be considered: one is the clock frequency, and the other is the core architecture. The clock frequency is easy to understand; it is akin to speed. For MCUs of the same architecture, the higher the clock frequency, the faster the MCU. Advanced architectures allow cores to execute more instructions per unit time, accomplishing more tasks. Therefore, one cannot judge the performance of MCUs of different architectures by merely looking at the clock frequency. Generally, the more advanced the core architecture, the more instructions and data it can process in a given time.It can be seen that the higher the clock frequency and the more advanced the core architecture of the MCU, the better its performance. This can be likened to a race: when the stride length is the same (i.e., the architecture is the same), the runner with a faster stride frequency (higher clock frequency) runs faster; and when the stride frequency is the same (same clock frequency), the runner with a longer stride (i.e., higher instruction execution efficiency) runs faster.Of course, there are other influencing factors; the size of memory capacity and the wafer process also affect processor performance to some extent. For instance, the larger the cache, the higher the hit rate of processor data access, which increases the efficiency of core calculations.Generally, embedded MCUs primarily demand stability, reliability, safety, and real-time control characteristics, while edge AI chips often require higher computing performance and storage capacity, as well as lower power consumption. For MCUs, the differences between architectures are more reflected in software and development ecosystems rather than performance. For AI chips, in addition to the functional requirements of general-purpose processors, there will also be demands specific to algorithms and applications, which may require relevant computing power and performance, such as SIMD/Vector capabilities, DSP capabilities, and openness of extended instructions.MCU: Arm or RISC-V?Yanjun Sheng, Market Director of Guomin TechnologyAccording to Yanjun Sheng, the Market Director of Guomin Technology, in the MCU market, Arm cores currently have the largest market share, their ecosystem is relatively sound, and the architecture has matured, leading to widespread application. However, Arm cores are limited by closed instruction set architecture, licensing, and patent fees, making it inconvenient for segmentation and customization. Additionally, the performance differences among various Arm cores are significant, and as the operating frequency of Arm cores increases, the power consumption of MCU chips rises rapidly. Therefore, how to reduce power consumption for MCU chips using high-frequency Arm cores is a considerable challenge for MCU manufacturers.For general-purpose MCUs, the advantage of using Arm architecture is that it can maintain compatibility with mainstream ecosystems, fully reuse existing application designs, and lower the design-in threshold. Most domestic MCU manufacturers have entered the MCU market based on this concept, which has proven to align with the development needs of China’s semiconductor industry. However, the drawbacks of this approach are becoming increasingly apparent, as we have seen the homogenization problem of domestic MCU chips becoming more severe. If competition can only be based on price, it benefits neither the industry nor most companies within it. Some capable and visionary domestic MCU manufacturers have recognized this and begun to shift towards differentiated product planning and market competition.In terms of processor core selection, besides Arm, RISC-V is now also an option. The RISC-V architecture has advantages such as low power consumption, low cost, open-source, modularity, simplicity, small area, and high speed. However, its disadvantages are also apparent, mainly reflected in: the development toolchain is not user-friendly; the software ecosystem is not well-developed; and there is a lack of a rich selection of chip series. Ultimately, this is due to its short development time and the overall ecosystem being underdeveloped.Wei Lu, Product Market Director of AiputeAccording to Wei Lu, the Product Market Director of Aipute Microelectronics, the company has adhered to using proprietary cores and various IPs required for MCUs since its establishment. Although achieving autonomous control of microprocessors through technological innovation is quite challenging, the value and advantages of persistence are also very evident. In response to the current pain points in the development of RISC-V MCUs, Aipute has collaborated with Pingtouge to build a “development editing toolchain.” The compiler currently supports “what you see is what you get” and supports multiple RTOS, including AliOS, with the entire toolchain achieving a complete ecosystem from the ground up to the basic system and core components.To address the issue of insufficient richness in development options faced by engineers and developers, Aipute has developed a complete series of RISC-V products: from 20Pin to 200Pin, frequencies from 32KHz to 2GHz, and processors from 32-bit to 64-bit. Wei Lu stated that the company plans to release 25 series with over 300 models of RISC-V products, covering consumer, industrial control, and automotive-grade applications.Edge AI Chips: Arm or RISC-V?Shiqing Technology is a startup that develops edge AI chips based on RISC-V cores. Its co-founder and president, Yu Xin, expressed his views on Arm and RISC-V architectures in an interview with Electronic Engineering Magazine. Arm has a better ecosystem, including development tools, operating system support, and a broad developer base, as well as a richer selection of models. However, AI chips require efficient support for various artificial intelligence algorithms, which is not a strong point of general-purpose processors. The effects achieved through Arm’s native extensions like VFP and NEON are still quite limited. Therefore, AI chips need more specialized processor cores, which are beyond the coverage of Arm (or general-purpose processors).President Yu Xin of Shiqing TechnologyIn contrast to Arm, the openness, modularity, and scalability of RISC-V can help AI processors better integrate with application and algorithm characteristics and requirements. Shiqing has also explored this aspect, developing the Timesformer processor based on the RISC-V architecture specifically designed for edge-side voice and vision algorithm characteristics, which is a unique advantage of RISC-V.In terms of software and ecosystem, AI chips based on RISC-V architecture still face some challenges. However, since AI applications often require chip manufacturers to provide complete solutions of chips + algorithms, the underlying architecture is not particularly sensitive to most downstream customers, which somewhat masks the shortcomings of RISC-V.Best Match Between Microprocessors and ApplicationsThere is no absolute good or bad regarding processor architecture; it depends on specific application requirements. General-purpose chips using Arm architecture will have inherent advantages, which are difficult to shake in the short term. Arm is a 32-bit Reduced Instruction Set (RISC) processor architecture with a wide range of applications, currently mainly in mobile phones, PCs, servers, automobiles, IoT, and artificial intelligence solutions. In emerging application areas, especially in embedded product applications like smart control, edge computing, and portable products, Arm architecture processors have very good application prospects. For instance, IoT, industrial networking, and industrial control, smart appliances and smart home IoT terminals, consumer electronics, motor drives, battery and energy management, smart metering, medical electronics, automotive electronics, security, biometrics, communications, sensors, and machine automation are all very suitable for using Arm architecture MCU products.According to Yanjun Sheng, Guomin Technology is currently primarily developing a series of chip products based on Arm Cortex-M0, Cortex-M4, Cortex-M7, etc., focusing on general-purpose MCUs, security chips, and wireless RF, which have been widely applied in electric control, industrial, automotive, medical, IoT, and consumer fields, and are expanding into automotive-grade MCUs, digital power, motor control, and other segmented MCU markets.IoT applications and those with strong specificity are more suitable for using MCUs based on RISC-V. RISC-V is an ISA suitable for both general-purpose MCUs and domain-specific accelerators (such as AI), with modular and customizable advantages, meaning it can be deployed to meet specific application needs, thus tailoring solutions for different IoT application requirements. IoT applications belong to a long-tail market, characterized by severe fragmentation, with many small but diverse applications emerging.Wei Lu revealed that Aipute plans to simultaneously enter both the general-purpose and specialized markets in 2022. In the specialized market, its new products will cover areas including motor drives, touch buttons, HMI, smart voice, and other application scenarios; in the general-purpose market, it plans to launch general MCUs with various rich peripherals, covering frequencies from 48MHz to 250MHz, and storage capacities from 64K/8K to 512K/128K, including key peripherals such as USB, CAN, SDIO, and encryption engines.Yu Xin of Shiqing believes that for specialized AI chips that require better integration of algorithms and hardware through underlying architecture innovation, RISC-V may be a good choice, allowing chip developers more flexibility to design the microarchitecture of processors, and some underlying and foundational toolchains and instruction sets do not need to be reinvented, which is a feasible approach to leverage the strengths of RISC-V at this stage.Future Ecosystem DevelopmentArm’s RISC architecture has low power consumption, low cost, high concurrency processing efficiency, and fast upgrade speed, and it inherently has IoT genes, giving it a competitive advantage in 5G network infrastructure and IoT application areas. The current trend for Arm is to develop towards servers and high-performance computing, which may encroach on more x86 market share. The future markets faced by Arm mainly include servers, mobile terminals, ICT infrastructure, automotive, and embedded scenarios. Arm’s overall participation and market growth potential in these applications are immense, with very good development prospects.Currently, the entire MCU ecosystem is still predominantly dominated by Arm architecture, with many manufacturers choosing to replicate and be compatible with European and American chips as a shortcut. However, we are gradually seeing more domestic manufacturers join the RISC-V ranks. Now, end customers are also beginning to accept RISC-V MCUs.Regarding the construction of the RISC-V MCU ecosystem, Wei Lu stated that Aipute will work with Pingtouge to build a complete RISC-V toolchain and MCU ecosystem. In addition to RISC-V’s CSI component certification, Aipute will also develop the “1520” ecosystem standard, which means getting started in 1 day, prototyping in 5 days, and mass production in 20 days. Currently, Aipute has independently developed a complete development kit, including debugging tools, programming tools, and compilation software, enabling engineers to conveniently use RISC-V MCUs.The RISC-V ecosystem has rapidly developed in embedded applications. With the emergence of high-performance RISC-V cores, the RISC-V ecosystem will develop towards high-performance computing. However, in the foreseeable future (say within 3-5 years), it will still be relatively challenging for RISC-V to compete on equal footing with Arm. Yu Xin believes that RISC-V may first break through in some segmented areas and then seek to expand, which is a more realistic path. Certain segmented areas are less sensitive to ecosystems and have higher differentiation requirements, such as edge AI chips. Additionally, for the domestic market, areas with higher demands for “self-control” are also fertile ground for RISC-V development, such as the Xinchuang industry.In summary, as a latecomer and relatively niche player, RISC-V needs to leverage its advantages of openness, simplicity, scalability, and modularity, fully capitalize on its strengths while avoiding weaknesses, to gradually develop and grow, ultimately forming a situation where Arm, x86, and RISC-V share the market.Author: Gu ZhengshuEET Electronic Engineering Magazine OriginalEND
