(Source: Semiconductor Industry Observation)
After more than a decade of accumulation, RISC-V has transformed from an emerging force to a backbone of the industry.
On one hand, more and more major companies that previously focused solely on other architectures have entered this field and delivered impressive results. For instance, Qualcomm has shipped 650 million RISC-V cores by the end of 2023, while Intel has cumulatively produced around 3 billion chips based on RISC-V cores;
On the other hand, in addition to its rapid growth in the MCU market, RISC-V has also found a place in the AI chip market. Companies founded by legendary chip engineers like Jim Keller, as well as giants like Meta, have all recognized the potential of RISC-V in the AI market. Of course, numerous newly established RISC-V companies, both domestically and internationally, are also emerging. With their collective efforts, this new architecture has opened up new territories in consumer electronics, automotive, industrial, PC, and even server markets.
After 15 years of development, RISC-V has finally entered the high-performance era.
Standing at this pivotal moment, Alibaba’s Damo Academy XuanTie team, which has a first-mover advantage, is fully committed to RISC-V. On February 28, the XuanTie team held a RISC-V ecosystem conference in Beijing, revealing not only breakthrough progress in the industry’s first generation of server-grade CPUs but also showcasing the complete picture of a high-performance ecosystem.
This is a crucial strategic move.
RISC-V Moves to High-End, Processor Lineup Upgraded
As a well-known brand under Alibaba’s Damo Academy, XuanTie is one of the earliest teams in China to invest in RISC-V architecture for technological innovation and ecosystem development.
Specifically, the full series of processors is the foundation of XuanTie. Since launching the first RISC-V processor, XuanTie C910, in 2019, the Damo Academy XuanTie team has developed a family of XuanTie processors covering high performance, high energy efficiency, and high real-time capabilities, including the C (C910, C906, C907, C908, C920) series, E (E902, E906, E907) series, and R series (R908, R910), to meet performance demands across all scenarios. Applications also cover various popular scenarios such as smart terminals, network communications, AI computing, servers, and peripherals.
Leading competitiveness is reflected in the market. At last year’s ecosystem conference, Zhang Jianfeng, the director of Alibaba Damo Academy, revealed that the shipment of processors equipped with XuanTie RISC-V cores has exceeded 4 billion units, making XuanTie one of the most popular processor IP series in the domestic RISC-V field.
Indeed, at this stage of industry development, most of XuanTie’s RISC-V cores are applied in embedded scenarios similar to MCUs. However, XuanTie’s ambition for high performance was already evident with the C910, which was a processor that broke the performance ceiling of RISC-V at the time and marked the starting point for exploring high-performance RISC-V globally, continuously incubating innovative applications over the past few years.
It is foreseeable that the upcoming high-performance processor C930 will become another milestone in the development of RISC-V.
Due to historical development reasons, the high-performance processor market has been primarily dominated by the x86 architecture, and even earlier by the IBM Power architecture. However, in recent years, Arm, which has long attempted to enter this market without success, has finally found an opportunity and is rising strongly in the server chip market. Cloud service providers, including Amazon, Microsoft, and Google, have all launched their own high-performance Arm server chips, striving to carve out a share of a market originally dominated by Intel, and have already achieved good results.
Thus, many believe that RISC-V, which is also a reduced instruction set architecture and has highly customizable features, can stand on the shoulders of giants and quickly establish a foothold in the high-performance processor market. This is one of the reasons why teams, including Damo Academy XuanTie, are vigorously promoting RISC-V to the high-end.
It is reported that the upcoming flagship processor C930 from XuanTie is comparable to the Arm Neoverse series, featuring a 15-stage out-of-order superscalar pipeline design, supporting the CHI protocol, and offering multi-core and multi-cluster scalability, with a 6-decode width and 10+ issue width. With these outstanding designs, its SPECint 2006 score exceeds 15 points/GHz, reaching the level required for server-grade applications, capable of meeting the demands of high-performance computing scenarios such as PCs, edge servers, and autonomous driving.
While setting a new benchmark in performance, XuanTie also revealed that it is developing new products such as C908X, R908A, and XL200, continuing to advance in AI acceleration, automotive, and high-speed interconnects. Among them, C908X supports RVV1.0 vector extensions and increases to a 4096-bit ultra-wide data bit width, making it XuanTie’s first AI-specific processor; R908A is a virtualizable multi-core hard real-time processor suitable for high-reliability requirements in automotive scenarios; XL200 provides a higher-performance multi-core multi-cluster interconnect solution.
XuanTie RISC-V’s foundation is becoming broader and deeper.
The ecosystem advances, accelerating RISC-V’s entry into the “high-performance” deep waters
As we all know, hardware requires software and a good ecosystem to support its expanded applications and serve diverse scenarios. In other words, whether these processors can be better utilized is a key concern for developers looking to transition to RISC-V. Therefore, in addition to focusing on the breadth and depth of processors, XuanTie is also advancing in RISC-V applications and ecosystem development.
According to reports, the team is building a high-performance ecosystem centered around XuanTie RISC-V, collaborating with ecosystem partners to promote the integrated development of RISC-V chips, development tools, operating systems, and application solutions across different levels, fully driving the multi-domain development of RISC-V software and hardware stack technology.
For example, around the XuanTie high-performance RISC-V processors, Lauterbach has improved problem diagnosis and performance optimization efficiency, Zhaosong Technology has supported compilation optimization, Arteris’s NoC interconnect IP provides high-performance interconnect, and Nucypher provides eHSM modules and a complete secure boot process.
These strong collaborations aim to facilitate the industry in truly developing high-performance XuanTie RISC-V chips.
In terms of applications, at last year’s technology ecosystem conference, the Software Research Institute of the Chinese Academy of Sciences announced the industry’s first open-source RISC-V notebook “Ruyi BOOK Jiachen” based on the XuanTie C910. It was reported that this notebook can run large office software such as DingTalk and Libre Office smoothly on the openEuler operating system. The release of this notebook represents an enhancement in the RISC-V ecosystem’s support for general computing capabilities, and it has also opened up the full link from the underlying chip to the operating system and commercial software for RISC-V.
Entering this year’s technology conference, the Software Institute revealed that the “Ruyi BOOK Jiachen” has successfully achieved mass production, and they will also launch a RISC-V PC “Ruyi BOOK Yisi” equipped with a 64-core XuanTie C920 processor. It is reported that this notebook’s AI computing power has increased by 3.8 times compared to the previous generation.
At the same time, the Software Institute also showcased intelligent robots, AI PCs, and other high-performance RISC-V applications. Among them, the AI PC concept machine based on the XuanTie C920 processor has successfully run open-source models such as Llama, Qwen, and DeepSeek, establishing a “full link of open-source AI” from open-source hardware architecture to open-source operating systems and open-source AI models, reducing unit computing energy consumption by 30%, and supporting capabilities such as AI personal assistants, AI programming, and AI vision, representing another breakthrough for RISC-V processors in AI.
Regarding the ecosystem cooperation model, at last year’s XuanTie RISC-V ecosystem conference, Damo Academy initiated a new attempt in the RISC-V industry—the establishment of the “No Sword Alliance”. Specifically, this involves deeply promoting IP collaboration, toolchain optimization, operating system adaptation, solution expansion, and application promotion based on XuanTie processors, continuously reducing RISC-V development costs and shortening the time to market for RISC-V products and applications.
The “No Sword Alliance” allows these leading players to truly integrate deeply, sparking new ideas:
On one hand, Synopsys provides tools such as VC Formal, VC PS, and Fusion Compiler for the design, implementation, and functional verification of the C910 processor, achieving optimal PPA metrics, and jointly launching the deeply integrated “No Sword 300” chip design platform with XuanTie to help chip manufacturers shorten development cycles;
On the other hand, Arteris’s interconnect backbone has been adapted to XuanTie high-performance processors, which is expected to replicate and promote to more high-performance processor customers.
After a year of development, the first batch of RISC-V chips has emerged from the No Sword Alliance: China Telecom Research Institute has created the industry’s first RISC-V video transcoding card TeleVPU based on the TH1520 chip prototype. It is reported that this card reduces costs by 20% compared to industry solutions, possesses 20T AI computing power, and can handle 40 channels of 1080p HD video encoding and decoding, with a single card memory of up to 40G, and has already been deployed in the live network.
With these examples, the “No Sword Alliance” welcomed new members this year.
With Siemens EDA and Cadence actively joining, the “three giants of EDA” have gathered in the “No Sword Alliance”; Jingwei Hengrun will provide chip definition, AUTOSAR basic software, and self-developed toolchain development based on RISC-V, building a complete automotive-grade solution from chip to software; PwC’s basic software has released the first large-scale, mass-production-level open-source safe vehicle control operating system Xiaoman (EasyXMen), which has completed adaptation to the RISC-V architecture and will continue to track and support the latest RISC-V architecture-related specifications, co-building a technology ecosystem of software and hardware collaboration to promote RISC-V “onboard”; in addition, the alliance has also absorbed NetEase Youdao and State Grid NARI, who will prioritize the RISC-V architecture in their respective fields of educational hardware and power grid to promote related digital and intelligent upgrades.
In terms of software tools, XuanTie has also achieved significant integration. The company has adapted three operating systems: Android, Linux, and RTOS, and launched corresponding SDKs, fully integrating the software capabilities accumulated over the years in XuanTie, providing a more complete, convenient, and stable way to output to the industry. In particular, the XuanTie Linux SDK offers a rich set of subsystems, including Hypervisor virtualization, CoVE security framework, XuanTie AI framework, and high-performance operator libraries, assisting in the development of RISC-V in high-performance and AI scenarios.
After all, hardware is an IP, but software is a stack of software and libraries, and a company cannot do everything. Everyone draws from the ecosystem, allowing customers to truly benefit from it, and then gives back to the ecosystem; this is the long-term path for RISC-V development.
DeepSeek Sparks Reflection: The Greatness of Open Source
Once upon a time, our expectations for processors were all aimed at pursuing stronger performance and better experiences, which is one of the reasons why the Damo Academy XuanTie team continues to push for high-end RISC-V processors and the launch of C930.
After crossing the SPECint2006 score of 15, C930 may fully leverage its advantages of small area and low power consumption, penetrating into server scenarios. Perhaps, in two or three years, the industry will see a cloud instance based on C930.
In the foreseeable future, RISC-V will continue to push towards high-end. NVIDIA’s success and roadmap also prove the correctness of this path. However, at the end of last year, the domestic large model DeepSeek emerged as a dark horse, leading globally and triggering new reflections on the future development of artificial intelligence and chips:
On one hand, unlike Google and OpenAI, DeepSeek is an open-source model. The success of an open-source model has shown everyone the value and leadership of open source. Even Sam Altman, CEO of OpenAI, known for building closed-source models, admitted for the first time: “I personally believe we are on the wrong side of history here and need to find a different open-source strategy. Not everyone in OpenAI agrees with this view, and it is not our current top priority.”
As the only “born open-source” architecture among mainstream instruction set architectures, RISC-V’s potential is highly anticipated.
Another reflection brought by DeepSeek is that low computing power can also make large models possible. Readers familiar with the underlying principles of DeepSeek know that this model actually achieves lower computing costs with a lower activation ratio, making single-machine deployment possible without the need for large servers. It is this design that breaks the “superstition” of traditional architectures.
Computing architecture is facing a reshuffle.
In the past, it was believed that parallel computing could only be done with GPUs. Now, not only GPUs can do it, but basically all computing architecture on the market can adapt to DeepSeek. The value of CPUs in the AI field deserves to be reassessed.
Based on these reflections, Damo Academy XuanTie is considering the integration of native AI computing power while building multiple series of RISC-V processors, including high-performance processors. To this end, C930 not only targets general high performance for server-grade applications but also features the first 8 TOPS Matrix engine, achieving a leap in AI computing power compared to the previous generation Vector engine.
At the same time, XuanTie is also laying out AI-specific processors, with C908X being one representative. This processor supports ultra-wide vector instruction sets (up to 4096 bits), allowing customers who need it to add very wide custom instruction sets.
It also prepares RISC-V for an infinitely broad AI future.
In Conclusion
When discussing future development plans, XuanTie stated that while adhering to the paths of high performance and AI, the company will also focus on iterating its processor product line to meet the diverse needs of developers.
As the Chinese institution that has invested the most in the RISC-V Foundation, Damo Academy XuanTie will also collaborate with leading international partners to contribute more to the construction of standards while improving the software ecosystem required for high-performance and emerging AI scenarios. The proposal of the Matrix extension instruction is another representative work of XuanTie’s “daring to be the first in the world”.
Undoubtedly, the high-performance era of RISC-V has arrived, and the XuanTie team is leading this open-source architecture to new heights with technological innovation as its sword and ecosystem construction as its shield.