ARMv8/v9 GIC Interrupt Handling: Priority, Preemption, and Nesting
ver0.3 Introduction In previous articles, we introduced the ARM architecture’s interrupt controller GIC, which maintains a state machine for each interrupt signal. This interrupt state machine supports four states: Inactive, Pending, Active, and Active and Pending. The GIC maintains the status of each signal through internal registers and performs state transitions under relevant trigger conditions. … Read more