Understanding ARM Cortex-M4 and Cortex-M0+ Interrupt Priority and Nested Preemption Issues
Sitting on the high-speed train from Shanghai to Beijing, the long journey really makes one feel bored (I couldn’t get a direct train, so I can only go slowly, stopping at every station. It’s ridiculous that in the high-speed train era, it still is like this. It reminds me of the time in college when … Read more
