To meet the needs of high-definition video and images, designers of display and camera SoCs need to use high-bandwidth interfaces to allow data to be transmitted at extremely fast speeds. MIPI D-PHY and C-PHY each have advantages in meeting these requirements, but if designers can use an integrated IP solution that operates in C-PHY mode at 3.5 Gsps per Trio (three lines) and D-PHY mode at 4.5 Gbps per channel, they can enjoy the benefits of both protocols. We invite you to watch the video demonstration of Synopsys DesignWare MIPI C-PHY/D-PHY IP and its interoperability with image sensors operating in C-PHY and D-PHY modes, to understand how this capability is realized in FinFET process technology for camera and display applications.
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