Linux Kernel Character Module (Part 3)

Linux Kernel Character Module (Part 3)

Linux Kernel Character Module (Part 3) 1. Atomic Operations Atomic operations are indivisible single-step operations that either complete entirely or do not occur at all in a multi-core/concurrent environment, and cannot be interrupted by other threads. They are used to avoid race conditions and ensure the correctness of concurrent data structures without always using heavyweight … Read more

Introduction to C++ Multithreaded Concurrent Programming

Introduction to C++ Multithreaded Concurrent Programming

Introduction: Why Do We Need Concurrency? In today’s world, where Moore’s Law is slowing down, the improvement of single-core performance has reached a bottleneck. CPU manufacturers have turned to multi-core architectures, which means modern computers generally have multiple cores capable of executing multiple computational tasks simultaneously. To fully utilize these hardware resources, concurrent programming has … Read more

RISC-V Atomic Compare and Swap (CAS) Instruction – Zacas

RISC-V Atomic Compare and Swap (CAS) Instruction - Zacas

Introduction: RISC-V (pronounced “risk-five”) is a new instruction set architecture (ISA) originally designed to support research and education in computer architecture. However, in recent years, it has evolved into a standardized, free, and open architecture for industrial implementations. One significant advantage of the RISC-V instruction set is its scalability, allowing users to select appropriate extension … Read more

Why Does (++i) + (++i) Result in 6 When i=1 in C Language?

Why Does (++i) + (++i) Result in 6 When i=1 in C Language?

For this calculation, most programming languages yield a result of 5, but in C language, the result is 6. This article explains why. One explanation comes from the perspective of assembly language, which shows the corresponding assembly code for the relevant C statements, illustrating how the assembly code computes the result of 6 by performing … Read more

Understanding the Low-Level Implementation of Atomic Operations in the Linux Kernel (armv8-aarch64)

Understanding the Low-Level Implementation of Atomic Operations in the Linux Kernel (armv8-aarch64)

Typically, a line of code like<span><span>a = a + 1</span></span> translates into three assembly instructions: ldr x0, &aadd x0,x0,#1str x0,&a That is, (1) read the variable a from memory into the X0 register, (2) add 1 to the X0 register, (3) write the value of X0 back to memory a. Since there are three instructions, … Read more