The Concept of Levels:
What are voltage, current, and power? Radio enthusiasts are well aware of these. However, when it comes to the term “level”, few can explain it clearly. Although people frequently encounter high levels, low levels, level gain, and level attenuation in circuits, and even multimeters essential for electricians have methods for measuring levels, the term “level” itself is abstract, and without appropriate metaphors, people often struggle to understand and remember it.
When people first learn about electricity, they often use the concrete phenomena of water to metaphorically explain abstract electrical concepts. For example, water flow is analogous to electric current, water pressure to voltage, and water resistance to electrical resistance. To explain “level”, we can use a similar approach. The term “level” refers to a state that is parallel to a horizontal plane or indicates a certain height in a certain aspect, implying a comparative conclusion under equal conditions. For example, when people say that Zhang has a high level of work, and Li has a low level of handling affairs, they understand the meaning. This implies a comparison between Zhang and Li. Thus, using “level” as a metaphor for “electric level” can facilitate understanding.
What is “level”? “Level” refers to the relative ratio of electric quantities at two or more points in a circuit under the same impedance. Here, electric quantities naturally refer to “power”, “voltage”, and “current”, and are logarithmically expressed in decibels (dB). They are represented as: 10lg(P2/P1), 20lg(U2/U1), 20lg(I2/I1), where P, U, and I represent power, voltage, and current respectively.
Using “dB” has two benefits: first, it simplifies reading, writing, and calculating. For example, the total amplification of a multi-stage amplifier can be multiplied by the individual amplification factors, but in decibels, they can be added. Second, it accurately reflects human perception of sound. Practice has shown that when the decibel level of sound doubles or halves, the perceived loudness to the human ear also increases or decreases by a factor of two. In other words, human hearing is proportional to the decibel level of sound power. For instance, the sound of a mosquito is a million times quieter than that of a cannon, yet the human perception of the difference is only 60 times, which corresponds to 60dB.
1. TTL Level:
TTL level signals are widely used because data representation typically employs binary standards, where +5V is equivalent to logic “1” and 0V is equivalent to logic “0”. This is known as the TTL (Transistor-Transistor Logic) signal system, which is the standard technology for communication among different parts of devices controlled by computer processors.
TTL level signals are ideal for data transmission within devices controlled by computer processors. Firstly, the data transmission requirements for power supply are not high, and heat loss is relatively low. Moreover, TTL level signals connect directly to integrated circuits without needing expensive line drivers and receiver circuits. Furthermore, data transmission within devices controlled by computer processors occurs at high speeds, and TTL interface operations meet these requirements. TTL communication mostly employs parallel data transmission, which is unsuitable for distances exceeding 10 feet due to reliability and cost issues. This is because parallel interfaces have problems with skew and asymmetry, which affect reliability.
TTL output high level >2.4V, output low level <0.4V. At room temperature, typical output high level is 3.5V and output low level is 0.2V. Minimum input high level and low level: input high level >=2.0V, input low level <=0.8V, noise tolerance is 0.4V.
TTL circuits are current-controlled devices, with fast speeds and short transmission delay times (5-10ns), but high power consumption.
Output L: <0.8V; H: >2.4V.
Input L: <1.2V; H: >2.0V
TTL devices output low level below 0.8V and high level above 2.4V. For inputs, below 1.2V is considered 0, and above 2.0 is considered 1.
2. CMOS Level:
CMOS stands for Complementary Metal Oxide Semiconductor, where many basic logic units are connected in a complementary manner using enhanced PMOS and NMOS transistors, resulting in very low static power consumption. The supply voltage for CMOS circuits allows fluctuations of ±10%, and when the output voltage is above VDD-0.5V, it is considered logic 1, while output voltage below VSS+0.5V (where VSS is digital ground) is logic 0, with fan-out of 10-20 CMOS gates.
Output L: <0.1*Vcc; H: >0.9*Vcc.
Input L: <0.3*Vcc; H: >0.7*Vcc.
If the CMOS power supply is 12V, input below 3.6V is considered low level, with noise tolerance of 1.8V, and above 3.5V is considered high level, with a higher noise tolerance of 1.8V. This provides better noise immunity than TTL.
3. RS232 Standard
RS-232 was originally a serial communication standard based on the public telephone network, with a recommended maximum cable length of 15 meters, meaning transmission distances generally do not exceed 15 meters. Its logic levels are symmetrical around a common ground, with logic “0” defined between +3 and +25V, and logic “1” between -3 and -25V. Thus, it requires both positive and negative dual power supplies and is not compatible with traditional TTL digital logic levels; level conversion is necessary between the two. Logic 1 is -3 to -15V, and logic 0 is +3 to +15V, noting that the definition of levels is inverted.
Commonly used level converters include integrated circuits represented by driver MC1488 and receiver MC1489. The MC1488 uses a ±12V supply to generate RS-232 standard levels, while the MC1489 uses a single +5V supply. For bidirectional data transmission, both components must be used simultaneously, requiring both positive and negative power supplies, which is clearly inconvenient.
TTL circuit levels are referred to as TTL levels, and CMOS circuit levels are referred to as CMOS levels. The full name of TTL integrated circuits is Transistor-Transistor Logic, mainly comprising the 54/74 series standard TTL, high-speed TTL (H-TTL), low-power TTL (L-TTL), Schottky TTL (S-TTL), and low-power Schottky TTL (LS-TTL) series. Standard TTL has a minimum input high level of 2V, a minimum output high level of 2.4V with a typical value of 3.4V, a maximum input low level of 0.8V, and a maximum output low level of 0.4V with a typical value of 0.2V. S-TTL has a minimum input high level of 2V, a minimum output high level of 2.5V for Class I, 2.7V for Classes II and III, with a typical value of 3.4V, a maximum input low level of 0.8V, and a maximum output low level of 0.5V. LS-TTL has a minimum input high level of 2V, a minimum output high level of 2.5V for Class I, 2.7V for Classes II and III, with a typical value of 3.4V, a maximum input low level of 0.7V for Class I, 0.8V for Classes II and III, and a maximum output low level of 0.4V for Class I, 0.5V for Classes II and III, with a typical value of 0.25V. The power supply for TTL circuits (VDD) is allowed only within the range of +5V±10%, with a fan-out of less than 10 TTL gate circuits.
CMOS integrated circuits are complementary metal oxide semiconductor circuits, where many basic logic units are interconnected in a complementary manner using enhanced PMOS and NMOS transistors, resulting in very low static power consumption. The supply voltage range for CMOS circuits is broad, functioning normally from +5 to +15V, with voltage fluctuations allowed at ±10%. When the output voltage exceeds VDD-0.5V, it is logic 1, while output voltage below VSS+0.5V (where VSS is digital ground) is logic 0, with a fan-out of 10-20 CMOS gates.
TTL level signals are extensively used because data representation typically employs binary standards, where +5V is equivalent to logic “1” and 0V is equivalent to logic “0”. This is known as the TTL (Transistor-Transistor Logic) signal system, which serves as the standard technology for communication among different parts of devices controlled by computer processors. TTL level signals are ideal for data transmission within devices controlled by computer processors. Firstly, the data transmission requirements for power supply are not high, and heat loss is relatively low. Moreover, TTL level signals connect directly to integrated circuits without needing expensive line drivers and receiver circuits. Furthermore, data transmission within devices controlled by computer processors occurs at high speeds, and TTL interface operations meet these requirements. TTL communication mostly employs parallel data transmission, which is unsuitable for distances exceeding 10 feet due to reliability and cost issues. This is because parallel interfaces have problems with skew and asymmetry, which affect reliability. Additionally, for parallel data transmission, the costs of cables and connectors are higher compared to serial communication methods. CMOS levels and TTL levels: CMOS level voltage ranges from 3 to 15V. For example, in the 4000 series, when powered at 5V, output above 4.6 is high level, and output below 0.05V is low level. Input above 3.5V is high level, and input below 1.5V is low level. For TTL chips, the supply range is 0 to 5V, commonly at 5V. For the 74 series powered at 5V, output above 2.7V is high level, output below 0.5V is low level, input above 2V is high level, and below 0.8V is low level. Thus, there is a level conversion issue between CMOS and TTL circuits to match their level domains.
4. Differences in Using TTL and CMOS Levels:
1. The definitions of upper and lower level limits differ; CMOS has a larger noise immunity area. At the same 5V supply, TTL is generally around 1.7V and 3.5V, while CMOS is typically around 2.2V and 2.9V, which is not accurate and is for reference only.
2. Current driving capabilities differ; TTL generally provides 25mA driving capability, while CMOS is around 10mA.
3. The required input current sizes differ; TTL generally requires around 2.5mA, while CMOS requires almost no input current.
4. Many devices are compatible with both TTL and CMOS, as indicated in the datasheet. If speed and performance are not considered, general devices can be interchanged. However, it should be noted that sometimes load effects may cause circuit operation to be abnormal, as some TTL circuits need the input impedance of the next stage as a load to function correctly.
1. Logic Levels of TTL and CMOS Circuits
VOH: Output voltage for logic level 1
VOL: Output voltage for logic level 0
VIH: Input voltage for logic level 1
VIL: Input voltage for logic level 0
Critical Values for TTL Circuits:
VOHmin=2.4V
VOLmax=0.4V
VIHmin=2.0V
VILmax=0.8V
Critical Values for CMOS Circuits (when power supply voltage is +5V)
VOHmin=4.99V
VOLmax=0.01V
VIHmin=3.5V
VILmax=1.5V
2. Logic Level Conversion between TTL and CMOS
CMOS levels can drive TTL levels, but TTL levels cannot drive CMOS levels without a pull-up resistor. 3. Characteristics of Common Logic Chips
74LS series: TTL input: TTL output: TTL
74HC series: CMOS input: CMOS output: CMOS
74HCT series: CMOS input: TTL output: CMOS
CD4000 series: CMOS input: CMOS output: CMOS
(1) TTL high level is 3.6~5V, low level is 0V~2.4V
CMOS level Vcc can reach 12V.
CMOS circuits output high level approximately 0.9Vcc, while output low level approximately 0.1Vcc.
Unused input terminals of CMOS circuits must not be left floating, as this can cause logical confusion.
Unused input terminals of TTL circuits floating will be considered as high level.
Additionally, CMOS integrated circuit supply voltages can vary over a wide range, so the power supply requirements are not as strict as those for TTL integrated circuits.
Using TTL levels makes them compatible.
(2) TTL level is 5V, while CMOS level is generally 12V.
Since the power supply voltage for TTL circuits is 5V, and the power supply voltage for CMOS circuits is generally 12V, a 5V level cannot trigger CMOS circuits, while a 12V level can damage TTL circuits, making them incompatible.
(3) TTL Level Standard
Output L: <0.4V; H: >2.4V.
Input L: <0.8V; H: >2.0V
TTL devices output low level must be less than 0.4V, and high level must be greater than 2.4V. For inputs, below 0.8V is considered 0, and above 2.0 is considered 1.
CMOS Level:
Output L: <0.1*Vcc; H: >0.9*Vcc.
Input L: <0.3*Vcc; H: >0.7*Vcc.
Generally, microcontrollers, DSPs, and FPGAs can connect directly. Under normal circumstances, devices with the same voltage can connect, but it is best to check the values of VIL, VIH, VOL, and VOH in the technical manual to see if they can match (VOL must be less than VIL, and VOH must be greater than VIH, referring to a connection). Some may not have issues under general applications, but the parameters may not match sufficiently, leading to instability in certain situations, or devices from different batches may not operate.
For example: devices from the 74LS series connected to devices from the 74HC series generally function well, but the parameters do not match, leading to potential issues in some cases.
74LS and 54 series are TTL circuits, while 74HC is a CMOS circuit. If their numbers are the same, they have the same logical function, but electrical and dynamic performance may differ slightly. The logical high level for TTL is >2.7V, while for CMOS it is >3.6V. If the previous stage of a CMOS circuit is TTL, there is an inherent risk of unreliability; the reverse is not problematic.
1. TTL Level:
Output high level >2.4V; output low level <0.4V. At room temperature, typical output high level is 3.5V and output low level is 0.2V. Minimum input high level and low level: input high level >=2.0V, input low level <=0.8V, noise tolerance is 0.4V.
2. CMOS Level:
Logic level 1 voltage is close to the power supply voltage, while logic level 0 is close to 0V. It also has a wide noise tolerance.
3. Level Conversion Circuit:
Due to the differing high and low level values of TTL and CMOS (ttl5v <==> cmos3.3v), level conversion is needed when connecting them: this involves using two resistors to divide the voltage levels, which is not complex. Haha.
4. OC gate, which is a collector open gate circuit, and OD gate, which is a drain open gate circuit, require external pull-up resistors and power supplies to function as high and low levels. Otherwise, they typically serve to switch large voltages and currents, hence they are also called driver gate circuits.
5. Comparison of TTL and CMOS Circuits:
1) TTL circuits are current-controlled devices, while CMOS circuits are voltage-controlled devices.
2) TTL circuits are faster with shorter transmission delay times (5-10ns) but have higher power consumption. CMOS circuits are slower with longer transmission delay times (25-50ns) but have lower power consumption. The power consumption of CMOS circuits is related to the pulse frequency of the input signal; the higher the frequency, the hotter the chip becomes, which is normal.
3) Locking Effect of CMOS Circuits:
Due to excessive input current, the internal current of CMOS circuits can increase sharply; unless the power supply is cut off, the current will continue to rise. This phenomenon is known as the locking effect. When the locking effect occurs, the internal current of CMOS can exceed 40mA, easily burning out the chip.
Preventive Measures:
1) Add clamping circuits at the input and output to ensure input and output do not exceed specified voltages.
2) Add decoupling circuits at the power input of the chip to prevent instant high voltage at the VDD terminal.
3) Add line resistors between VDD and external power supply, preventing large currents from entering.
4) When a system is powered by several power supplies, the order of switching should be: when powering on, first power the CMOS circuit, then the input signal and load power; when powering off, first turn off the input signal and load power, then turn off the power to the CMOS circuit.
6. Precautions for Using CMOS Circuits
1) CMOS circuits are voltage-controlled devices with high input impedance, making them sensitive to interference signals. Therefore, unused pins should not be left floating; they should be connected to pull-up or pull-down resistors to provide a stable level.
2) When connecting low impedance signal sources to the input, a current-limiting resistor should be placed in series between the input and the signal source to restrict the input current to within 1mA.
3) When connecting long signal transmission lines, a matching resistor should be placed at the CMOS circuit end.
4) When connecting large capacitors to the input, a protective resistor should be placed between the input and the capacitor. The resistor value should be R=V0/1mA, where V0 is the voltage across the external capacitor.
5) If the input current of CMOS exceeds 1mA, it may damage the CMOS.
7. Load Characteristics of Input Terminals in TTL Gate Circuits (Handling Special Cases with Input Resistors):
1) When floating, it is equivalent to connecting the input to a high level. This can be seen as connecting the input to an infinite resistance.
2) After placing a 10K resistor in series with the input terminal and then applying a low level, the input will present a high level rather than a low level. This is because, as per the load characteristics of the TTL gate circuit’s input, the low level signal can only be recognized if the series resistance connected to the input is less than 910 ohms; if the series resistance is larger, the input will always present a high level. This is crucial to note. CMOS gate circuits do not have this concern.
8) TTL circuits have collector open OC gates, while MOSFETs also have corresponding drain open OD gates, whose output is called open-drain output. The output of an OC gate has leakage current when cut off; this is the leakage current. Why is there leakage current? This is because when the transistor is cut off, its base current is approximately 0, but it is not truly 0, and the current through the transistor’s collector is also not truly 0, but approximately 0. This is the leakage current. Open-drain output: the output of the OC gate is open-drain output; the output of the OD gate is also open-drain output. It can absorb large currents but cannot output current externally.
Thus, to input and output current, it must be used together with the power supply and pull-up resistor. The OD gate is generally used as an output buffer/driver, level converter, and to meet the need for absorbing large load currents.
