"IT有得聊" is a professional IT information and service platform under the Machinery Industry Press, dedicated to helping readers master more professional and practical knowledge and skills in the broad field of IT, quickly enhancing their workplace competitiveness. Click the blue WeChat name to quickly follow us!CPU Architecture and Microarchitecture are two important concepts in computer science. CPU architecture refers to the overall design of a computer’s CPU and instruction set architecture, while microarchitecture refers to the internal design and implementation of the computer’s CPU.
CPU architecture usually refers to the CPU’s instruction set architecture, also known as ISA (Instruction Set Architecture). ISA defines the set of instructions supported by the CPU, as well as the operations and formats of these instructions. Common ISAs include x86, ARM, RISC-V, etc. These ISAs have different instruction sets and formats, thus requiring different compilers and software toolchains when running on different CPU architectures.
The impact of ISA on computer systems is profound. A good ISA can provide better performance, higher efficiency, and better portability. For example, x86 ISA has become the mainstream desktop and server CPU architecture due to historical reasons and market position. Meanwhile, ARM ISA has dominated the embedded field. When choosing a CPU, ISA is an important consideration, as different ISAs have different advantages and disadvantages, suitable for different application scenarios.
Next, we will introduce the architectures respectively.
CPU Architecture: x86 Architecture
x86 architecture is one of the most widely used instruction set architectures in the computer field, employed in personal computers, servers, and other types of computer systems. It is an instruction set architecture based on the CISC (Complex Instruction Set Computer) design philosophy. Its name comes from Intel’s first CPU, the 8086, which was released in 1978 and became the cornerstone of the x86 architecture. Over time, the x86 architecture has gradually evolved to become the foundation of modern computer architecture.
x86 architecture has the following characteristics:1. Complex Instruction Set:x86 architecture’s instruction set is more complex compared to RISC (Reduced Instruction Set Computer) architecture. This means that x86 architecture CPUs can execute more operations, but it also brings some performance losses.2. Strong Programmability:x86 architecture has a high degree of programmability, allowing programs to be written in assembly language or high-level programming languages.3. Strong Processing Capability:x86 architecture has strong processing capabilities and can support high frequency, multi-core CPUs.4. Backward Compatibility:x86 architecture is backward compatible, meaning that newer versions of CPUs can run software from older versions.x86 architecture plays an important role in the computer field, possessing powerful processing capabilities and high programmability, widely used in various fields.x86 Architecture Licensing Model:x86 architecture is a closed-source instruction set architecture. In the x86 architecture licensing model, Intel and AMD are the main x86 architecture licensing vendors, allowing other companies and organizations to utilize their x86 architecture through licensing and permits. These licenses typically cover the following aspects:1. CPU IP Core Licensing:Intel and AMD grant licenses to other chip design companies and manufacturers to use their x86 IP cores, enabling them to implement x86 architecture functionalities in their own chips.2. Chip Licensing:Intel and AMD allow other companies and organizations to use their x86 chips for the production and sale of their own x86 chip products.3. Software Licensing:Intel and AMD grant licenses to other software development companies and organizations to use their x86 instruction sets in their own software products.These licensing services typically require users to pay certain licensing and usage fees to obtain more technical support and services. Additionally, the details and terms of the licensing services may vary depending on different customers and partners, requiring negotiation and contract signing based on specific situations.Since x86 architecture is closed-source, compliance with Intel and AMD’s licensing terms and usage regulations is necessary when developing software and hardware products based on x86 architecture. This may impose certain impacts and restrictions on third-party developers. For example, when developing chips based on x86 architecture, licensing for x86 IP cores is required, as well as adherence to Intel and AMD’s chip manufacturing specifications and technical standards. When developing software based on x86 architecture, legal compilers and libraries must be used to comply with Intel and AMD’s usage terms and regulations. Furthermore, Intel and AMD typically update and upgrade their x86 architecture to support new technologies and functionalities. Therefore, timely updates to software and hardware are necessary to ensure compatibility with the latest x86 architecture and achieve better performance.CPU Architecture: ARM ArchitectureARM (Advanced RISC Machine) architecture is a Reduced Instruction Set Computing (RISC) CPU architecture designed by ARM Holdings, widely used in mobile devices, embedded systems, and other low-power devices. The main advantages of ARM architecture are low power consumption, high efficiency, and ease of implementation, making it an ideal choice for many mobile devices. In recent years, it has made significant inroads into desktop and server fields.ARM Architecture has the following characteristics:1. Reduced Instruction Set:ARM architecture employs a reduced instruction set, where each instruction is very simple and executes quickly, thus possessing high efficiency and low power consumption.2. Multiple Abstraction Levels:ARM architecture introduces multiple abstraction levels between hardware and software, making software development more flexible and portable.3. Strong Architecture Expansion:ARM architecture has many extensions, such as Thumb-2, NEON, and TrustZone, to meet different application needs.4. Various Implementations:ARM architecture implementations are highly flexible, allowing switching between different chip manufacturers, as well as choosing different packaging forms, core counts, and frequencies.The main characteristics and advantages of ARM architecture lie in its design philosophy, which adopts RISC’s instruction set design, resulting in fewer instructions, faster execution, and lower power consumption. Additionally, ARM architecture offers various implementation methods and programmability, enabling it to adapt to different application scenarios and needs. Besides performance, ARM architecture also has multiple security features, the most important being TrustZone. TrustZone provides hardware-level security protection for sensitive data and defense against malicious attacks.ARM architecture’s high efficiency, ease of customization, ease of integration, diverse markets, and open-source support make it one of the main architectures in the modern computing world. With the ongoing development of the Internet of Things and mobile device markets, as well as the pursuit of energy efficiency, ARM architecture will continue to play an important role in the future due to the following points:1. High Efficiency:ARM architecture is very suitable for running on low-power devices. It embodies the essence of RISC architecture, characterized by a simple instruction set and fast execution speed. ARM CPUs typically operate at low voltages and frequencies, thus exhibiting excellent energy efficiency.2. Ease of Customization:The flexibility of ARM architecture allows manufacturers to customize it according to their needs, adapting to various application scenarios. Therefore, ARM architecture CPUs are very suitable for embedded systems, such as smart homes, smart vehicles, and sensors.3. Ease of Integration:ARM architecture can easily integrate with other hardware and software. Many suppliers provide a wide variety of ARM CPUs and components, enabling manufacturers to quickly and easily integrate ARM architecture CPUs into their products.4. Diverse Markets:ARM architecture has been widely applied in multiple markets, including mobile devices, embedded systems, industrial control, medical devices, automotive, and gaming. This widespread application creates a robust ecosystem for ARM architecture CPUs, along with strong support and development tools.5. Open-source Support:ARM architecture CPUs have open-source support, allowing developers to utilize numerous open-source tools and software for development, thereby reducing development costs and time.ARM Architecture Licensing Model:ARM architecture is used in various scenarios including mobile devices, embedded systems, servers, and supercomputers. Its parent company licenses its architecture to other companies so they can design, manufacture, and sell chips based on ARM architecture. ARM offers various licensing models, divided into three types: IP core licensing, standard core licensing, and custom core licensing. These three licensing models differ in coverage, fees, usage conditions, and revenue.IP core licensing is the simplest and most common licensing method. IP (Intellectual Property) is a pre-designed, reusable functional block that can be integrated into chips. ARM licenses its IP cores to other companies, allowing them to incorporate ARM’s IP cores into their chips.IP core licensing usually applies to companies needing to implement basic functions, including CPU cores, bus interfaces, memory controllers, peripheral controllers, etc. ARM offers various IP cores, including Cortex-A, Cortex-R, Cortex-M, Neoverse, etc. These IP cores can be selected based on different application scenarios and performance requirements.In the IP core licensing model, the licensing company typically needs to pay licensing and usage fees. The licensing fee is a one-time fee paid to ARM to obtain the license. The usage fee is the cost paid to ARM for each chip. The licensing company can use ARM’s IP cores within a certain licensing range but cannot modify the design of the IP cores.Standard core licensing is a more flexible licensing method. In this model, ARM licenses its standard cores to other companies, which can modify and optimize the cores based on their needs. Standard core licensing typically applies to companies needing customized CPUs, which often require some customization and optimization of the cores to meet their application needs. ARM offers various standard cores, including Cortex-A, Cortex-R, Cortex-M, Neoverse, etc. These cores can be selected based on different application scenarios and performance requirements. In the standard core licensing model, the licensing company must pay licensing and usage fees. Unlike IP core licensing, the licensing company can modify and optimize the core to meet its needs. The licensing company can use ARM’s standard cores for chip design, manufacturing, and sales. ARM will provide technical support and updated core versions to the licensing company.Custom core licensing is the most flexible licensing method. In this model, ARM provides fully customized CPU cores to the licensing company, which can design and develop the cores according to their needs. Custom core licensing typically applies to companies needing specific features and performance, which often require in-depth core optimization and development to meet their application needs. ARM will provide corresponding technical support and customized core design and development services based on the licensing company’s requirements. In the custom core licensing model, the licensing company must pay higher licensing and usage fees. ARM will provide a higher level of technical support and services and offer customized CPU cores based on the licensing company’s needs.The choice of licensing model depends on the needs and capabilities of the licensing company. If the licensing company only needs to implement basic functions, then IP core licensing may be the most suitable choice. If the licensing company needs to perform some customization and optimization, then standard core licensing may be a better option. If the licensing company requires a fully customized CPU core, then custom core licensing may be the only choice.In addition to licensing models, licensing companies also need to consider other factors such as licensing fees, usage fees, technical support, core performance, and stability. Licensing companies should choose the licensing model and partners that best suit their needs and capabilities. ARM will provide corresponding technical support and services to ensure that licensing companies can successfully design, manufacture, and sell chips based on ARM architecture.CPU Architecture: RISC-V ArchitectureDesign Principles of RISC-V:RISC-V is an open, free, and customizable instruction set architecture suitable for various purposes of computer CPUs. RISC-V is built on the design philosophy of Reduced Instruction Set Computing (RISC). The design principles of RISC-V are simplicity, modularity, and scalability. These three principles collectively constitute the core idea of RISC-V. Specifically, the design of RISC-V follows these principles:1. Simplicity:The RISC-V instruction set is very simple, making it easy to implement and debug, and can be realized on different hardware platforms.2. Modularity:RISC-V adopts a modular design, allowing users to select appropriate instruction set extensions based on their needs. This flexibility allows RISC-V to be used in various application scenarios, from embedded systems to supercomputers.3. Scalability:The design of RISC-V allows users to add custom instructions to meet specific needs. This scalability enables RISC-V to provide efficient support for various applications.The RISC-V instruction set architecture consists of a series of instruction set architecture standards that describe how the CPU executes instructions, accesses memory and peripherals, and the composition and purpose of CPU registers, etc. The RISC-V instruction set architecture adopts a layered design approach, providing different levels of functionality and complexity to meet different application requirements.Design Goals of RISC-V:The RISC-V instruction set architecture offers 32-bit and 64-bit versions, where the 32-bit version is called RISC-V 32, and the 64-bit version is called RISC-V 64. The RISC-V instruction set architecture also provides scalability, allowing users to extend and customize based on their needs.The design goals of RISC-V architecture include:1. Simplicity:The instruction set architecture is simple, easy to understand, and implement.2. Customizability:It can be extended and customized based on application needs.3. Compatibility:It can interact with other CPU architectures and systems.4. Openness:The instruction set architecture is open, with no patent or copyright restrictions, allowing anyone to use it.5. High Performance:It provides high-performance and low-power computing capabilities.RISC-V architecture has the following advantages:1. Open Source:RISC-V is an open-source instruction set architecture, allowing anyone to use and modify it.2. Flexibility:The design of RISC-V has modular and scalable characteristics, making it very suitable for various application areas.3. Efficiency:The RISC-V instruction set is very concise, making it easy to implement and debug, and can be realized on different hardware platforms.4. Portability:RISC-V can be implemented on different hardware platforms and can be ported through compilers and operating systems.The openness and customizability of the RISC-V instruction set architecture provide it with a broad application prospect in various fields, including servers, embedded systems, the Internet of Things, and artificial intelligence. It has become one of the most focused technologies in the open-source community. In the coming years, RISC-V will see broader applications in various fields. For example, in mobile devices, the Internet of Things, machine learning, artificial intelligence, cloud computing, and high-performance computing, RISC-V has vast application prospects. Additionally, the design philosophy and architecture of RISC-V will significantly influence the future development of computer architecture.Licensing Model of RISC-V:RISC-V is an open-source instruction set architecture, so its licensing model differs from those of ARM and x86.Open Source Licensing:The licensing model of RISC-V is open-source, meaning anyone can freely use, modify, distribute, and sell implementations of the RISC-V architecture. This open licensing model provides individuals, companies, and organizations with extensive possibilities to use and customize RISC-V, thus attracting numerous supporters and developers.In the RISC-V licensing model, the RISC-V International Foundation serves as the standardization and promotion organization for the instruction set architecture, supporting and promoting the development and application of RISC-V technology through membership and membership fees. Members of the RISC-V International Foundation include various enterprises, academic institutions, and research organizations, which can gain more technical support, cooperation opportunities, and resource access by becoming members.Additionally, the RISC-V International Foundation provides some standardized extensions, such as vector extensions, security extensions, and multi-CPU extensions, which can be selected and customized based on user needs to meet different application scenario requirements.Commercial Licensing:Although RISC-V architecture is open-source, in practical applications, some companies and organizations may require additional commercial support and technical services. Therefore, some companies and organizations offer commercial licensing services to provide users with more technical support, guarantees, and services. These commercial licensing services typically include:1. Technical Support and Consulting:Providing technical support and consulting services tailored to user needs, including architecture design, system integration, software development, and more.2. IP Licensing and Permits:Providing licensing and permit services for RISC-V IP cores, allowing users to integrate them into their chip designs and use them in their products.3. Tools and Software Support:Providing support and licensing services for RISC-V development tools and software, enabling users to better develop and deploy their applications.These commercial licensing services typically require users to pay certain licensing and usage fees to obtain more technical support and services. Additionally, users should pay attention to the service level agreements (SLAs) of commercial licensing services to receive better technical guarantees and services.Microarchitecture:Microarchitecture refers to the design and implementation within the CPU. It describes how the CPU implements the instruction set in the ISA, including how to process instructions, access registers and memory, and handle interrupts and exceptions. Microarchitecture has a significant impact on CPU performance and energy consumption.Different CPU manufacturers and product lines often have different microarchitecture designs. For example, Intel’s CPU microarchitecture includes Nehalem, Sandy Bridge, Haswell, Skylake, etc.; AMD’s CPU microarchitecture includes K8, K10, Bulldozer, Zen, etc.; ARM’s CPU microarchitecture includes Cortex A/M, Neoverse V/N/E, etc. These microarchitectures have different design goals and optimization focuses, thus exhibiting different performances in various application scenarios.CPU architecture and microarchitecture are two distinct concepts, but they are closely related. ISA defines the instruction set supported by the CPU, while microarchitecture implements these instruction sets. One ISA can have multiple different microarchitecture implementations, so one CPU architecture can have multiple product lines, each with different microarchitecture designs.Furthermore, ISA can also influence the design of microarchitecture. A good ISA can provide better performance and efficiency, so CPU designers may make some optimizations at the microarchitecture level to maximize the advantages of ISA. For example, due to the complexity of the x86 ISA, CPU designers will make optimizations at the microarchitecture level to enhance performance and efficiency.With the development of technology and changes in market demand, both ISA and microarchitecture are continuously evolving and improving. New ISAs can provide more instructions and new functionalities, while new microarchitectures can leverage new hardware and software technologies to improve performance and efficiency. Therefore, the development of CPU architecture and microarchitecture is an ongoing process of innovation.CPU architecture and microarchitecture are two important concepts in CPU design, both significantly impacting CPU performance and energy consumption. ISA defines the instruction set of the CPU, while microarchitecture implements these instruction sets. A good ISA can provide better performance and efficiency, and CPU designers can optimize at the microarchitecture level to leverage the advantages of ISA. Both ISA and microarchitecture are continuously evolving and improving to adapt to new technologies and market demands.Microarchitecture determines the logical structure and operation methods within the CPU, including instruction sets, caches, pipelines, etc., which are the foundation for executing instructions. Its design is crucial, directly affecting CPU performance and power consumption. To enhance the performance of CPU microarchitecture, many optimization techniques are used in CPU design. Some common optimization techniques include:1. Pipeline Design:Pipeline refers to dividing instruction execution into multiple stages, allowing multiple instructions to be executed simultaneously. Through pipeline technology, the CPU can execute more instructions within a unit of time.2. Superscalar Technology:Superscalar technology refers to adding multiple execution units and instruction decoders in the CPU microarchitecture to support the simultaneous execution and dynamic scheduling of multiple instructions. Through superscalar technology, the CPU can enhance parallelism and execution efficiency.3. Branch Prediction Technology:Branch prediction technology refers to predicting the jump direction of branch instructions to reduce the impact of branch instructions on CPU performance. Through prediction technology, the CPU can improve the execution efficiency of branch instructions.4. Multi-level Cache Design:Multi-level cache refers to adding multiple cache levels in the CPU microarchitecture to reduce the number of times data is read from memory. Through multi-level cache technology, the CPU can significantly improve data access speed and efficiency.CPU microarchitecture is a core component of the CPU, determining its performance and power consumption. An excellent CPU microarchitecture needs to consider many factors. By continuously optimizing CPU microarchitecture, the computational performance and efficiency of the CPU can be improved, thus meeting increasingly complex computational demands.Feedback on “High-Performance Superscalar CPU: Microarchitecture Analysis and Design”
Click the cover to learn about the book details“High-Performance Superscalar CPU: Microarchitecture Analysis and Design” was fully launched in March 2023, attracting widespread attention from industry veterans, colleagues, university teachers, and students. In addition to encouragement and support, many questions have been raised. On this occasion, we will address some common concerns of readers one by one.Question 1: How should the term “High Performance” in the book title be understood? Why was the Intel P6 from over twenty years ago chosen as a design example?The writing team of this book has participated in the research and development of various architectures of domestically developed high-performance processors, covering mainstream architectures such as ARM, x86, and RISC-V. They have also closely collaborated with senior architects from top processor design teams at Intel, AMD, IBM, Qualcomm, ARM, Apple, etc. During the work process, in addition to their own R&D, they conducted extensive competitive product analysis and external technical exchanges.In terms of knowledge reserves and experience accumulation, the writing team confidently undertook the task of writing this book. Due to the need for commercial intellectual property protection, it is impossible to directly write about the specific implementations of domestically developed processors or foreign processor IP in public publications. Under lawful and compliant conditions, the writing team aligns with the advanced processor microarchitecture designs that can be accessed domestically, clearly writing out the principles, organizational structure, design and optimization ideas, as well as potential pain points in existing microarchitectures, providing a foundation for achieving practical microarchitecture design.As for why the Intel P6 from over twenty years ago was chosen as a design example, the primary reason is still the aforementioned commercial intellectual property issue. Even though the writing team has conducted in-depth analysis of microarchitectures and source codes of commercial processors released in the last two to three years, such as ARM Neoverse N2 and Cortex X1, it is impossible to fully present their details. Naturally, the microarchitecture of domestically developed processors that they have been responsible for cannot be publicly written either. As a design example analysis, if every part’s details cannot be clearly explained, it would undoubtedly lose its meaning. Besides avoiding commercial intellectual property issues, the Intel P6 microarchitecture, despite its age, has pioneered some technical improvements and design concepts that not only opened the way for modern high-performance processor microarchitecture design but also remain a reference for current processor microarchitecture design. This point is unanimously affirmed by the authors of the writing team. They hope that readers can gain insights into the classic CPU design to integrate the explanations of each part of microarchitecture design in the book.Question 2: Some content is only touched upon, leaving readers wanting more.The writing team of this book, being frontline engineers, is publishing a book for the first time, and thus lacks experience in writing specialized works. Furthermore, due to the collaborative nature of multiple authors, there are subtle differences in specific writing ideas and presentation styles, coupled with time constraints from daily work, leading to some unsatisfactory aspects in the end, whether regarding instruction sets or microarchitecture-related content. Not only the readers but also the authors recognize that many contents and knowledge points are merely listed without elaboration, and we apologize to the readers for this. The authors themselves have transitioned from related professional students to junior engineers and then to senior engineers, and they understand what readers are eager to see, which is also the original intention of writing this book. They believe that through the collaboration of the writing team, they will certainly deliver a satisfactory answer to the readers in the future.Question 3: Is this book suitable for college students or readers with no background?During the initial planning of this book, a certain degree of selection was made regarding the detail of content based on the target reader group. The basic idea was to focus on showcasing current mainstream application technologies and more popular development trends, while the development history and currently marginal technologies were slightly overlooked or not deeply elaborated. This may seem somewhat “dry” and “hard” for some readers. After publication, some university teachers and students communicated with the authors and raised questions about the content, prompting the authors to reassess the book from the perspective of teaching usage. Some readers may be interested in the development history and comparative analysis of processor architectures and microarchitecture technologies, which the book does not fully elaborate on. Additionally, regarding the basic knowledge of computer architecture, the authors will strive to explain the principles involved in analyzing microarchitecture, while assuming that readers will self-learn and master some general basic concepts. Different universities may have different focuses in their computer architecture courses and use different textbooks, and thus no judgment is made here.Question 4: How should junior engineers utilize this book?Reflecting on the author’s experiences when first entering the industry, there was a pressing need to quickly engage in projects. For individuals, the available materials were primarily architecture design specification documents and source codes. This raises a methodological question: is it more efficient to learn from the top down or from the bottom up? Different people may have different experiences and views, which is somewhat akin to the distinction between the “sword school” and “qi school” in martial arts novels. There is no unified answer here. The author can only share from their perspective, as there were not many reference materials available at that time (or rather, not many friendly materials for beginners), so they adopted a bottom-up learning approach, which involves reading code and debugging to get started, and later reviewing architecture documents and relevant papers. This indeed forms a closed loop. However, from the author’s experience, if a theoretical framework can be established from the beginning, then the specific work at the micro level can certainly be done more efficiently with fewer detours. The author writes this book to share their processor design methodology with readers, providing a perspective to allow readers to experience whether it can be helpful to them, thus enabling them to learn from it.Question 5: Is it necessary for senior processor engineers to read this book?This question is one that the author cannot provide a conclusive answer to. It can only be said that for any reader, the author’s attitude is one of communication, regardless of the level of business capability or the superiority of technical routes, because the vast majority of practitioners view problems from their personal perspectives, which will inevitably have limitations, and the author is also a reader of other authors. The saying goes, “Gentlemen can be harmonious yet different,” and the author believes that multifaceted communication and discussion are necessary factors in advancing the industry’s development. The idea that “building a car behind closed doors and then finding it fits the track” may not apply to the current industry situation in our country. Here, a quote from the movie “The Grandmaster” is apt: “In fact, the world is not just north and south; forcing oneself to be comprehensive is equivalent to stagnating. The so-called greatness may seem lacking, but it is precisely this lack that leads to progress.” The author hopes that industry peers can recognize this small effort and welcomes all criticisms and suggestions.For detailed content on CPU architecture and design, readers can click “Read the Original”.
This article is sourced from the WeChat public account “Intelligent Computing Chip World“
Editor: Zhang Shuqian
Reviewer: Shi Jing