This article discusses the software reset methods of the kernel. The software reset in the backup domain reset of STM32 is not within the scope of this article. It is worth mentioning that a power-on reset completely resets all aspects of the chip, including the kernel, debug part, peripherals, and the state of intermediate logic circuits (the state of logic circuits external to the module, which, if not reset, will affect the next run). Therefore, to ensure a complete reset, a power-on reset should be used.
1. Cortex-M3
Figure 1 is from the Cortex-M3 programming manual.
(1) SCB_AIRCR register, VECTRESET bit
This bit only resets the kernel and does not reset the debug part.
(2) SCB_AIRCR register, SYSRESETREQ bit
This bit is generally called a system reset, defined to reset the kernel without resetting the debug part. Whether it resets other parts, such as peripherals, depends on the specific chip implementation.
Figure 1
2. Cortex-M0
Figure 2 is from the Cortex-M0 programming manual.
(1) SCB_AIRCR register, VECTRESET bit
Cortex-M0 does not provide this bit, meaning it does not have a separate definition for resetting the kernel.
(2) SCB_AIRCR register, SYSRESETREQ bit
Refer to Cortex-M3
Figure 2
3. Other References
The following figures 3 and 4 are from Cortex-M3-Definitive-Guide-EN.pdf
Figure 3
Figure 4