“Hardcore players leave Intel: vowing to create the ‘most explosive CPU’.”
01
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Andes Technology releases AndesSight™ v5.4 Integrated Development Environment, supporting RISC-V AI and embedded development
AndeSight Trade IDE v5.4 is the latest IDE tool launched by Andes for RISC-V to accelerate AI and embedded applications, enhancing vectorization strategies, debugging efficiency, NN library optimization capabilities, and toolchain compatibility. For RISC-V developers, it will significantly shorten product development cycles and improve AI performance and quality.
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Key Enhancements
Multi-core Debugging Optimization: Retains the “Core Grouping” feature, supporting SMP and AMP multi-core system debugging (RISC-V multi-core/vector platform NX27V, etc.).
Automatic Vectorization: The compiler can automatically generate RVV vector instructions, allowing C code to fully utilize vector performance without manual assembly.
Script Recording and Playback: Supports recording and playback of debugging scripts, facilitating problem reproduction and automated testing.
Pipeline Visual Analysis: Strengthens the AndesClarity™ pipeline analyzer, capable of identifying bottlenecks, causes of stalls, and resource conflicts.
AndeSoft™ NN Library Optimization: Supports INT8/FP16, compatible with various quantization methods, and highly optimized for vector units.
For example, running MobileNet-v1 (FP16) on the 512-bit RVV based NX27V processor can achieve up to a 96× speed increase compared to standard instructions.
TensorFlow Lite Support: Can run TFLite models on development boards, facilitating AI application development.
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Software Toolchain and Platform Compatibility
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Comprehensive compiler/toolchain support for RVP, RVV, as well as highly optimized DSP/vector libraries and sample code.
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Supports mainstream RTOS (such as SMP support for Zephyr, FreeRTOS, etc.) and Linux SMP systems, with communication between AMP systems via OpenAMP.
Original link:https://www.design-reuse.com/news/202528843-andes-technology-announces-andesight-trade-ide-v5-4-to-streamline-ai-and-embedded-software-development-on-risc-v/
02
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IAR’s Progress in Supporting the RISC-V Ecosystem
IAR is steadily expanding its support for RISC-V, from core architecture (RV32E/32/64) coverage, toolchain optimization, and IDE features, to collaborations with companies like SiFive, Codasip, Renesas, and NSITEXE, building a complete, efficient, scalable, and certified RISC-V development ecosystem, particularly suitable for embedded and functional safety fields.
IAR Embedded Workbench for RISC-V
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IAR’s flagship IDE, aimed at C/C++ development, has expanded comprehensive support for RISC-V architecture, including:
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RV32E: A streamlined version for smaller embedded devices.
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RV32/RV64: Addressing higher core and performance requirements (as of 2022, it covers 32-bit, with future versions fully expanding support for 64-bit)..
Collaboration with Chip Companies
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Collaboration with SiFive: IAR has established a partnership with leading RISC-V company SiFive to jointly launch solutions for the professional market, optimizing user experience and performance..
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Collaboration with Codasip: Expanding the ecosystem integration of low-power RISC-V, achieving higher energy efficiency and code optimization capabilities.
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Renesas Support: IAR is the first to provide fully supported IDE tools for the general-purpose RISC-V MCU launched by Renesas, enhancing adaptability for traditional MCU manufacturers entering RISC-V.
3. Functional Safety and Ecosystem Expansion
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Collaboration with NSITEXE: Providing certified RISC-V toolchain support for functional safety applications, enhancing reliability in highly safety-demanding fields such as medical, automotive, and industrial.
4. Toolchain Updates and CI/CD Support
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IAR’s RISC-V toolchain is continuously upgraded (e.g., version 1.20), adding support for RV32E, and integrating static analysis, debugging, compilation, and other functions..
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Supports modern development processes (CI/CD, cloud environments), promoting the delivery efficiency of RISC-V in real enterprise-level projects.
IAR (IAR Systems) is a global leader in embedded system development tools and services, headquartered in Sweden, with subsidiaries in the USA, Japan, the UK, Germany, Belgium, Brazil, and China.
Original link: https://www.presseagentur.com/iar/detail.php?pr_id=7387
03
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NanoCluster: Integrating Seven Computing Modules in the Size of a Soda Can
Sipeed’s NanoCluster is an extremely compact yet feature-rich DIY computing cluster motherboard. It can be configured with cost-effective Raspberry Pi Compute Modules or Longan M4N modules with AI accelerators as needed. Thanks to RISC-V switching chips, redundant power support, and rich peripheral interfaces, it provides a portable, fun, and affordable platform for edge AI, distributed system entry, and home experimentation.
Supported Module Types
Compatible with four types of SOM, can be mixed and matched:
Raspberry Pi Compute Module 4
Raspberry Pi Compute Module 5
Sipeed Longan Pi 3H (Allwinner H618 quad-core Cortex-A53)
Sipeed M4N (quad-core Cortex-A55 + 18 TOPS NPU)
Power and Interfaces
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Supports 65 W USB-C PD and optional 60 W PoE, with dual power redundancy.
Application Scenarios
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Suitable for small-scale cluster exploration in scenarios such as HomeLab, distributed computing, Kubernetes/Docker, edge processing, and AI inference.
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Provides an affordable and modular platform, convenient for hobby and educational purposes.
Original link:https://www.hackster.io/news/sipeed-s-nanocluster-packs-up-to-seven-compute-modules-into-the-volume-of-a-soda-can-bf6d7232acde
04
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Accelerating the Europeanization of RISC-V: The EU Needs to Adjust Funding Strategies to Align with Industry
RISC-V has become an “irreversible trend”
At the RISC-V Europe Summit, academic representatives Teresa Cervero and Stefan Wallentowitz emphasized that RISC-V is evolving from academic experiments to real commercial products, and its development momentum is unstoppable: “The train has already started; you can’t stop it anymore.” Market research is also showing exponential growth, and accessible commercial prototypes will drive continuous industry investment.
European Industry is Accelerating Its Participation
**Infineon** announced it will launch RISC-V based automotive MCUs, becoming the first European remote member of RISC-V International, which is a significant industry endorsement.
A Strong European Collaborative Ecosystem
The European summit attracted numerous engineers and researchers from Europe, Asia, and the USA, forming a multinational collaboration network. Cervero pointed out that thanks to “researchers coming from America, Europe, and Asia,” the collaboration network is becoming increasingly solid. Wallentowitz described RISC-V as providing a “common framework” for multi-project collaboration in Europe, becoming a bridge for research integration.
Academic Institutions Remain Key
European research centers continue to contribute innovative results (such as ETH Zurich’s PULP platform), providing a source of “crazy ideas” for industrial design. However, the transition from academia to commercial use needs to be strengthened, and the industry needs to invest more effort to push technologies towards product production.
Original link:https://www.eetimes.com/momentum-builds-on-risc-v-european-adoption/
05
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Orange Pi R2S: Compact Network Device Integrating Edge AI Capabilities
Orange Pi R2S is a compact RISC-V single-board computer aimed at edge AI and network applications, measuring approximately 79×46 mm, with no video output, designed for headless routing, edge computing, and switching device scenarios.
Product Positioning
A super compact RISC-V single-board computer with no video output, suitable for edge AI, soft routing, firewalls, lightweight gateways, and other headless device scenarios.
Core Configuration
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Processor: Ky X1 SoC, octa-core RV64GCVB, 1.6GHz, outperforming Cortex-A55.
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NPU: Integrated AI accelerator, inference capability up to 2 TOPS (INT8).
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GPU: Imagination BXE-2-32, supporting OpenGL ES, Vulkan, OpenCL.
Storage and Memory
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Memory options: 2GB, 4GB, 8GB LPDDR4X.
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Onboard 8GB eMMC, supporting microSD card expansion.
Network and Interfaces
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Network interfaces: 2 × 2.5GbE + 2 × Gigabit Ethernet ports (total of four).
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USB: 1 × USB 3.0 + 1 × USB 2.0 (for flashing).
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Also equipped with serial ports, LED indicators, etc.
⚡ Power and Size
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USB-C power supply (5V/3A), dimensions 79.2 × 46 mm, weight approximately 60g.
Operating System
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Supports Ubuntu 24.04, OpenWrt 24.10, default using Linux 6.6 kernel.
Price Reference
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2GB version: approximately $30
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4GB version: approximately $39.9
Original link:https://www.hackster.io/news/orange-pi-blends-edge-ai-with-compact-network-appliance-capabilities-in-the-orange-pi-r2s-3c09a6d81cbe
06
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Intel’s Top Team Leaves to Start Up, Vowing to Create ‘The Strongest CPU Ever’
A group of senior CPU engineers and executives from Intel have left to establish AheadComputing in Portland, Oregon, focusing on developing high-performance CPUs based on the open-source RISC-V architecture. They have secured $21.5 million in seed funding, with investors including Eclipse Ventures, Maverick Capital, Fundomo, EPIQ Capital, and Apple/Tesla chip architect Jim Keller (who is also operating the RISC-V startup Tenstorrent).
Research Motivation and Market Blueprint
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The startup team aims to address bandwidth bottlenecks and data processing limitations in AI computing, hoping to replace some applications in x86 and Arm systems with RISC-V architecture.
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CEO Debbie Marr pointed out that the open RISC-V ecosystem is more friendly to innovation, not controlled by a single family.
Strategy and Vision
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The current goal is to design high-performance RISC-V CPUs targeting markets with high throughput and efficiency requirements, such as AI and HPC (high-performance computing).
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Eclipse investment partner Greg Reichow expects the relevant market size to reach $100 billion by 2030, providing broad opportunities for AheadComputing.
Original link:https://www.oregonlive.com/silicon-forest/2025/06/top-researchers-leave-intel-to-build-startup-with-the-biggest-baddest-cpu.html