RISC-V: An Open-Source Instruction Set Architecture Revolutionizing Chip Design

RISC-V is an open-source instruction set architecture (ISA) based on the Reduced Instruction Set Computer (RISC) principles, first proposed by a research team at the University of California, Berkeley in 2010. Its core design philosophy is to provide flexibility and autonomy in chip design through a modular and extensible instruction set, breaking the licensing restrictions of traditional proprietary architectures such as ARM and x86. Below is a detailed analysis of RISC-V chips:

1. Core Features and Advantages

1. Open Source and Free

   The RISC-V instruction set specification is completely open, allowing any company or individual to use, modify, and distribute it for free, without paying licensing fees. This significantly lowers the barriers to chip development, especially benefiting startups and academic research.

2. Modularity and Scalability

   RISC-V adopts a modular design of “base instruction set + extension instruction set.” The base instruction set (such as RV32I, RV64I) defines core computational functions, and users can add extension modules (such as floating-point operations F/D extensions, vector computing V extensions, AI acceleration instructions, etc.) according to their needs, achieving customized designs.

3. Low Power Consumption and High Efficiency

   The simplified instruction set design reduces hardware complexity, allowing chips to consume less power when performing simple tasks. For example, Alibaba’s T-Head Xuantie series processors have significantly improved energy efficiency through optimized pipeline design, making them suitable for IoT devices.

4. Autonomy and Control

   The open-source nature avoids the risk of technological monopoly from architectures like x86 and ARM, providing a controllable technological path for the semiconductor industry in countries like China.

2. Development History and Ecosystem Building

• Technological Evolution

  In 2010, the Berkeley team launched the RISC-V project, releasing the first ISA specification in 2011, and establishing the RISC-V Foundation (now renamed RISC-V International) in 2015. By 2025, there are over 4,000 members globally, covering more than 70 countries.

• Commercial Breakthroughs

  • In 2019, Alibaba released the high-performance Xuantie 910 processor, and in 2022, Intel joined the RISC-V camp.

  • In 2025, the Alibaba Xuantie C930 server CPU is expected to be delivered, achieving a SPECint2006 performance of 15/GHz, comparable to ARM A78 and x86 architectures.

• Policy Support

  China plans to launch national-level policies to promote the application of RISC-V in automotive electronics, servers, and other fields, aiming for a fully controllable industrial chain.

3. Application Fields and Typical Cases

1. Embedded and Internet of Things (IoT)

   The low power consumption and flexibility of RISC-V make it the preferred choice for devices such as smart homes and industrial sensors. For example:

   • GigaDevice’s MCU chips support both ARM and RISC-V cores, used in consumer electronics and industrial control.

   • Espressif’s RISC-V chips have an annual shipment of over 200 million units, covering smart home and edge computing scenarios.

2. Artificial Intelligence (AI)

   • Edge Inference: Accelerating matrix operations through vector instructions (RVV), such as the Alibaba Xuantie C920 achieving a 17-fold improvement in computational efficiency when running the DeepSeek-R1 model.

   • Cloud Large Models: The Xuantie C930 supports inference for models with billions of parameters, and NVIDIA’s RISC-V-based GPUs have shipped over 1 billion units.

3. Servers and High-Performance Computing

   • The Xuantie C930 server CPU supports 16-core interconnects, achieving SPECint2006 scores exceeding those of x86 counterparts, and has been used in Alibaba Cloud’s Shadow Server.

   • European HPC projects like “Xiangshan” adopt RISC-V architecture, aiming to enhance autonomous capabilities in supercomputing.

4. Automotive Electronics and Industrial Control

   RISC-V combined with DSP optimizes industrial control algorithms, for example, Rockchip’s industrial control chips used in smart grid monitoring systems.

4. Challenges and Future Trends

1. Current Challenges

   • Ecosystem Shortcomings: Software adaptation (such as compilers, operating systems) and toolchain maturity lag behind ARM.

   • Performance Validation: High-performance cores require more scenario validation, as data center-level chips still need breakthroughs.

2. Future Directions

   • Edge AI Revolution: Heterogeneous computing architectures adapted for scenarios like robotics and AR devices.

   • Inclusive Open Source Ecosystem: Promoting a “developer for all” model to accelerate technological democratization.

   • Policy-Driven Domestic Substitution: China plans to guide the penetration of RISC-V in key areas through policy.

5. Core Enterprises in the Industry Chain

Conclusion

RISC-V chips are reshaping the global chip industry landscape through their open-source, flexible, and scalable characteristics. Their penetration from embedded devices to high-performance computing not only drives technological innovation but also provides companies with opportunities to bypass traditional architectural barriers. Although ecosystem development still needs improvement, with the dual drive of policy support and market demand, RISC-V is expected to become one of the core architectures in fields such as AIoT and data centers.