In March 2025, China launched its first national policy-level guidance to encourage the promotion of open-source RISC-V chips. This policy was jointly drafted by the Ministry of Industry and Information Technology, the Cyberspace Administration, the Ministry of Science and Technology, the National Intellectual Property Administration, and other eight departments, aiming to reduce dependence on Western technology and achieve independent control over chips. Upon the announcement of the policy, several RISC-V chip-related companies, such as SiFive and Allwinner Technology, saw their stock prices rise sharply, indicating a positive market reaction. Experts pointed out that this will provide official endorsement for the popularization of RISC-V chips, significantly enhancing their strategic position in domestic substitution and independent innovation.
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Why RISC-V?
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Global Interest in Open Instruction Set Architecture (ISA Open Trend)
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Open instruction sets (like RISC-V) do not require patent or licensing fees, allowing anyone to design processors based on them.
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The open-source model promotes collaboration within the global hardware community, accelerating the pace of chip innovation and iteration.
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Limitations of ARM / x86 Licensing Models
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ARM and x86 are closed architectures that require high licensing fees and strict usage permissions.
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Factors such as supply chain and political risks may lead to restricted licensing and insufficient technological autonomy.
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Rising Demand for Independent Control in China’s Semiconductor Industry
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In the context of information security and industrial safety, China needs to master full-link autonomy from instruction set to chip design.
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RISC-V, as an open architecture, provides a “double insurance” for domestic substitution and independent innovation.
Timeline of the Past Decade (Intertwining Policies, Enterprises, and Communities)
2014 ~ 2016: Introduction and Trial Period
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Universities and research institutes began translating and testing RISC-V specifications (Chinese Academy of Sciences, Tsinghua University) [1]
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The open-source hardware community started small-scale porting (RT-Thread, LiteOS attempts)
In 2018, the RISC-V Alliance was established in China, chaired by Academician Ni Guangnan; Turing Award winner David Patterson announced the release of the Chinese version of the “RISC-V Handbook” translated by the Institute of Computing Technology, Chinese Academy of Sciences, at the founding ceremony. Subsequently, the Software Institute of the Chinese Academy of Sciences continued to maintain this translation, hosting it on GitHub, becoming an important foundational resource for RISC-V education and research in academia and industry. Meanwhile, universities such as Tsinghua University and Peking University joined the alliance, playing a role in promoting ecological construction.
2017 ~ 2018: Industry Begins to Shine
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Chipone Technology was established, launching the first batch of commercial RISC-V IP in China
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Pingtouge was established (Alibaba acquired Zhongtian Micro), laying out the self-developed Xuantie series
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The first batch of RISC-V development boards (such as KD233) hit the market [2]
As the open instruction set architecture spread in the global academic and open-source communities, Chinese universities, research institutes, and startups joined this wave. Teams from the Institute of Computing Technology, Chinese Academy of Sciences, and Tsinghua University were among the first to launch self-developed RISC-V processor prototypes, validating them in scenarios such as FPGA, IoT, and embedded control. At the same time, companies like Alibaba’s Pingtouge, Chipone Technology, and GigaDevice began to layout RISC-V core research and ecological construction, with related chip samples, development boards, and compiler toolchains gradually maturing. Although the scale was still small at this stage, it laid the foundation for China’s future transition from following to leading in the RISC-V field.
2019 ~ 2021: Policy and Capital Injection
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The Ministry of Industry and Information Technology promoted “Domestic Instruction Set Applications”
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Several startups received tens of millions in financing (AIoT, automotive-grade)
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The first RISC-V China Summit was held
The Ministry of Industry and Information Technology and other regulatory authorities successively included “independent controllable instruction sets” in industrial development plans, and many local governments introduced support policies to encourage RISC-V applications in IoT, artificial intelligence, industrial control, and other fields. The capital market also responded quickly, with companies like Pingtouge, Chipone Technology, and Sifang Technology completing multiple rounds of financing, attracting upstream and downstream partners to join ecological construction. Meanwhile, higher-performance RISC-V processor IP, operating system porting versions, and development platforms were launched domestically, initially forming a nascent industrial chain of collaborative development among chip design, software toolchains, operating systems, and application solutions, laying a solid foundation for subsequent large-scale commercialization.
2021 ~ 2022: Technological Breakthroughs and Ecological Acceleration
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Xiangsahn open-source high-performance core marks the entry of domestic high-performance CPU design onto the international stage [3]
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Loongson, ShenKongHong, and other companies invested in RISC-V industrial and IoT products
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Linux distributions (openEuler, Debian) increased support for RISC-V
The Chinese RISC-V industry has entered a critical period of technological breakthroughs and ecological acceleration, with high-performance multi-core processors and 64-bit platforms supporting Linux emerging one after another, with some products achieving clock speeds exceeding 2GHz and realizing specialized optimizations in AI inference and edge computing. Core toolchains such as operating systems, compilers, and debuggers are becoming increasingly complete, with domestic operating systems like openEuler and RT-Thread adapting to multiple RISC-V chips. Meanwhile, the number of chip mass production cases is gradually increasing, with RISC-V solutions rapidly advancing in commercial applications from smartwatches and educational computers to industrial control boards. Communities and enterprises jointly hold developer conferences, ecological days, and other events to promote positive interactions among upstream IP design, downstream application vendors, and open-source communities, marking a new stage of accelerated growth in the industrial ecosystem.
2023 ~ 2025: Independent Innovation and Global Competition
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CUDA on RISC-V and AI inference acceleration projects launched
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TH1520 and Xuantie C910 commercial landing
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Domestic toolchains (Xuantie Toolchain, OpenCloudOS RISC-V version) [4]
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The scale of the RISC-V ecosystem in China has surpassed 1,000 participating enterprises/organizations for the first time
The Chinese RISC-V industry has entered a new chapter of independent innovation and global competition. High-end general-purpose processors, AI-specific accelerators, and automotive-grade MCUs are advancing simultaneously, with some designs approaching or even surpassing international counterparts in performance, power consumption, and security features. Domestic manufacturers frequently introduce original solutions in instruction expansion, architecture optimization, and heterogeneous computing, driving the continuous evolution of RISC-V standards. Meanwhile, Chinese companies actively participate in the international RISC-V Foundation and technical working groups, competing alongside global manufacturers and gaining increasing influence in the open-source community. As the domestic ecological chain matures, RISC-V not only occupies a place in the domestic market but also begins to receive commercial orders overseas, with Chinese strength becoming an important variable in the global RISC-V competitive landscape.
Analysis of Three Major Driving Forces
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Policy Drive: Trustworthiness, Security, and Independent Control
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Enterprise Layout: From IoT to High-Performance Computing
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Open Source Community: Open Chip Design and Collaborative Software Stack Development
In terms of policy drive, the state continues to strengthen its strategic directions in trustworthiness, security, and independent control, viewing RISC-V as an important fulcrum for building a domestic software and hardware ecosystem;in terms of enterprise layout, from early-stage startups focusing on low-power IoT chips to leading enterprises now investing in high-performance computing, AI acceleration, and automotive-grade chips, RISC-V has covered a diverse range of application scenarios from edge to cloud;in terms of the open-source community, the trend of open chip design and the collaborative development of software stacks mutually promote the full-link localization from instruction set implementation to operating systems, compilers, and AI frameworks. These three forces intertwine, enabling China’s RISC-V to complete a leap from trial to full competition in just a few years.
Conclusion
The development of RISC-V in China has transitioned from the early stage of “introduction and digestion” to the “independent innovation” stage, with core technologies and ecological construction accelerating towards depth.
In the next three to five years, AI acceleration is expected to become a breakthrough point, achieving performance leaps in edge inference and large model training through customizable instructions and heterogeneous computing architectures;the RISC-V servers and storage processors in the data center sector have the potential to penetrate the domestic substitution market, meeting high concurrency and high security demands;the maturity of domestic EDA tools will further break the bottleneck in the design process, reducing chip development costs and shortening iteration cycles. Breakthroughs in these areas will determine the height and breadth of China’s RISC-V in global industrial competition.
Friendly Reminder: The next article in this series will review the ecological map of RISC-V in China, so remember to follow in advance!
Reference Links:
[1] https://cnrv.io/bi-week-rpts/2018-03-02 RISC-V Biweekly Report (2018-03-02)
[2] https://www.cnblogs.com/bluestorm/p/12527969.html Analysis of RISC-V Ecological Architecture (2020-03-19)
[3] https://zhuanlan.zhihu.com/p/417167775 4 Years, 21 Documents, 100,000 Words: Documenting the Trajectory of RISC-V in China
[4]http://www.aii.sdu.edu.cn/info/1002/1641.htm Shandong University Intelligent Innovation Research Institute’s technical team assists OpenCloudOS RISC-V SIG in successfully adapting EDK II
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