On August 13, at the biennial National Computer Architecture Academic Conference (ACA2020), Hu Weiwu, Chairman of Loongson Technology and researcher at the Institute of Computing Technology, Chinese Academy of Sciences, delivered a keynote report titled “Autonomy and Compatibility of Instruction Systems”.
In the report, he revealed new developments from Loongson—the development of the LoongArch instruction set, which is both “autonomous” and “compatible”. If the goal is achieved, it will be a system with a “complete” ecosystem that can be firmly controlled by the Chinese.
Discussions about this event have made it to the trending list on Zhihu, where a senior industry insider told DeepTech: “The plan for LoongArch has been proposed for a long time, but the recent ‘supply cut’ issues have highlighted its urgency. The industry has long wanted to launch a Chinese-owned instruction set system, but due to conflicting interests, consensus has been hard to reach. This may be an opportunity.”
Autonomous Development vs. Choosing Sides
The American Democratic and Republican parties often disagree on many issues, but they have rarely reached a consensus on their attitude towards China. It is foreseeable that, regardless of whether Trump is re-elected, there will not be significant changes in American policy towards China.
Currently, the goal of “building an information technology system and industrial ecosystem that is independent of the Wintel system(Windows + Intel) and the AA system(ARM + Android) that is secure and controllable” has become a national strategy.
To achieve this goal, the issue of “chips” cannot be bypassed. The chip dilemma can be divided into two parts: the CPU’s instruction set architecture and the manufacturing process. This article will not discuss the process issue, but will focus on the former.
Instruction Set Architecture, also known as the instruction set or instruction set system, is the infrastructure for running computer software. The instructions of the instruction set are converted into machine code and directly interact with the CPU, serving as a lower-level encapsulation than assembly language.
Image | The meaning of this instruction is: add the value at address 2 to a constant, then write it to address 1.
Currently, the instruction sets active in the commercial field can be divided into two main categories: Reduced Instruction Set (RISC), represented by ARM, RISC-V, and MIPS, and Complex Instruction Set (CISC), represented by X86. The terms reduced and complex can be simply understood as the number of instructions included.
Vendors using the X86 architecture include the well-known Intel and AMD. This architecture was originally created by Intel, and due to historical reasons, it has formed a duopoly. It is worth noting that the X86 architecture is no longer licensed to external parties.
The ARM instruction set has many products, and due to its advantages in power consumption, almost all smartphones (Apple, Android), tablets, and portable smart devices must purchase licenses from ARM, making it commercially successful. Currently, ARM is owned by Japan’s SoftBank, but there are rumors that NVIDIA will acquire ARM, which would then belong to the United States.
RISC-V is quite special; it is an open-source (only ISA) instruction set architecture, meaning that the RISC-V instruction set can be freely used for any purpose, allowing anyone to design, manufacture, and sell RISC-V chips and software without paying patent fees to any company.
China is the most enthusiastic country about RISC-V, without exception.
To what extent? The RISC-V official website shows that among its ten chief members, eight are Chinese companies and organizations, including Alibaba, Andes Technology (Taiwan), Huawei, the Institute of Computing Technology, Chinese Academy of Sciences, the Institute of Software Research, Chinese Academy of Sciences, RIOS (Tsinghua – Berkeley Shenzhen Institute), ZTE Microelectronics, and SiFive China.
Image | RISC-V Chief Members
Although RISC-V belongs to a global non-profit organization and theoretically should not face “bottleneck” issues, the core managers of this organization are mostly Americans, and currently, there is significant fragmentation, with many useful and efficient instructions unable to be added to the main branch. In summary, it seems unlikely that China will gain a dominant position in this system.
Finally, we must mention the MIPS used by Loongson.
It still belongs to an American company, and Loongson is its largest customer. This company has gradually declined due to strategic misjudgments, has gone through several acquisitions, and has suffered significant loss of developers, making it unable to develop new products. It is not an exaggeration to say that without Loongson, MIPS would be dead. However, this company has not been able to obtain approval from the U.S. government for Loongson to acquire it.
In summary, X86 does not license, ARM has strict licensing, and China has previously relied on RISC-V and MIPS.
Hu Weiwu stated that the debate between autonomy and compatibility has lasted for 15 years. The advantage of compatibility is that it comes with an ecosystem, but the disadvantage is that it is subject to external control, which severely hinders the development of foundational software represented by the “operating system”. He believes that we cannot establish an autonomous ecosystem based on foreign instruction systems.
“Loongson once chose MIPS for licensing, thinking it was relatively open and allowed for autonomous instruction additions, so it has been a long journey. It was thought that a self-built ecosystem could be constructed based on the relatively weaker MIPS or the open-source RISC-V, but recent events have made us realize that even if the other party is weak, it can still cause significant commercial interference. “
Therefore, the only path left for Loongson is likely to be the establishment of its own instruction set.
Compatibility and Inclusiveness
Complete autonomy sounds easy, but it is difficult to achieve; creating a usable product is easy, but creating a product that everyone uses is difficult. Is it possible to be both independent and compatible with the current mainstream ecosystem?
Hu Weiwu’s answer is “yes”. It is to develop an autonomous instruction set architecture that is compatible with major instruction set architectures.
Hu Weiwu stated that this path is entirely feasible.
First, in terms of foundational software, the migration of BIOS (PMON/UEFI) and kernels (Linux/VxWorks) involves a manageable workload; the work for assemblers and compilers (GCC, LLVM, GOLANG) is controllable; the entire operating system’s migration and compilation workload is also manageable, as MIPS assembly language can be directly compiled into the autonomous instruction system.
Secondly, in terms of dynamic translation virtual machines, Loongson can independently complete the migration of the three major virtual machines: Java, JavaScript, and .NET, allowing applications to run directly without modification.
Finally, in terms of binary translation, it mainly targets X86, ARM, and MIPS. QEMU has already achieved this, and the key is to improve its running efficiency.
Currently, Loongson has completed the planning of its autonomous instruction set, which includes 337 basic instructions, 10 virtual machine extension instructions, 176 binary translation extension instructions, 1024 128-bit vector extensions, and 1018 256-bit vector extensions, totaling 2565 instructions. It is worth noting that the CPU area and latency overhead caused by the addition of binary translation instructions can be almost ignored.
Hu Weiwu explained that the hardware support for binary translation mainly involves fixed-point operations and memory address calculations. Statistical data indicates that the hardware overhead area increases by about 1% to 2%, while the latency overhead is almost negligible.
In the report, Hu Weiwu referred to this series of operations as “architecture translation“, and made a vivid analogy.
Image | Language Culture & Computer Architecture
He said, the effect we want to achieve now is language-level translation, with varying degrees of difficulty depending on the architecture.
For example, translating traditional Chinese to simplified Chinese is very simple, translating French to English is also relatively easy, but translating English to Chinese is comparatively difficult.
Technological advancements have brought new opportunities for binary translation. First, hardware resources have become significantly abundant. Transistors and CPU performance have reached a surplus. Second, virtual machine technology has rapidly developed. Binary translation is essentially a cross-instruction set virtual machine, and many foundational infrastructures supporting virtual machines can be reused in the binary translation system.
Some may ask, while binary translation can indeed be compatible with existing instruction sets, could there be legal issues?
Hu Weiwu believes that there are indeed differing opinions internationally, but the laws of developed countries like the United States generally consider it not to constitute infringement. Historically, IBM, HP, Intel, Apple, Transmeta, Qualcomm, and NVIDIA have all used this technology to assist in promoting new architectures, and Transmeta even won a lawsuit against Intel.
After basically determining the plan, Loongson has already begun to take action and has achieved initial results.
Loongson’s binary translation system is named LAT (Loongson Architecture Translator). Hu Weiwu has set a target for this system called “Nineteen Eighty-Seven”.
Image | LAT “Nineteen Eighty-Seven” Plan
Hu Weiwu shared a chart where the only variable is the instruction architecture, while the microarchitecture remains identical.
It can be seen that simply switching to the LoongArch instruction architecture improves the processor’s fixed-point performance by 16.6% and floating-point performance by 9.4%.
Image | LoongArch vs MIPS (SPEC CPU2000 Train runtime FPGA 20MHz)
In terms of Linux process-level MIPS binary translation, Hu Weiwu presented results that were temporarily generated for this report. He stated that many software libraries are still incomplete, and optimization work has not been finished. However, based on the results, achieving this effect in one or two months should not be a problem, and completing 100% of the target is expected.
Image | Linux process-level MIPS binary translation effect (SPEC CPU2000 Train runtime FPGA 20MHz)
For Linux process-level X86 binary translation, the data is also incomplete, but it can be seen that fixed-point performance reaches 44.4% of native performance, and floating-point performance reaches 58.5% of native performance. Although this result is already quite good compared to QEMU, there is still a significant gap from the target of 80%.
Image | Linux process-level X86 binary translation effect (SPEC CPU2000 Ref runtime Loongson 3A4000 1.8GHz)
In the report, Hu Weiwu reported on the current progress of the LoongArch instruction system.
He stated that the instruction system modifications for Loongson’s GS132, GS264, and GS464 series IP cores have been completed. A certain Loongson CPU based on LoongArch has been delivered for tape-out in Q2 2020, with sample chips expected in Q4 2020.
In terms of foundational software OS, BIOS and compiler kernel modifications have been completed, allowing complex applications like SPEC CPU to run on FPGA platforms; work on compiling the complete operating system is underway; and migration work for Java, JavaScript, and .NET virtual machines is also in progress.
The binary translation system LAT has basically completed development and is now in debugging and optimization. User-mode binary translation for MIPS and X86 is continuously improving; X86 system binary translation has been basically completed, with the most challenging address translation already debugged.
All of the above work is expected to be completed by the end of 2020.
At the end of the report, he outlined the future plans for LoongArch.
1. Conduct an intellectual property analysis of the LoongArch instruction system. A third-party organization has been commissioned to conduct this analysis, with the domestic portion expected to be completed by the end of 2020 and the international portion by 2021.
2. Form an autonomous instruction system alliance. Loongson will open LoongArch for free and also open IP cores for processors with performance below Cortex-A53, provided that there are no instruction system lawsuits among alliance members, with the hope of ultimately forming a CPU defense alliance against third parties. Additionally, efforts will be made to promote a small system with about a hundred instructions of LoongArch in universities.
Furthermore, Loongson will continue to improve hardware support for binary translation and software optimization, aiming to eliminate barriers between instruction systems by 2025, achieving a state of “universal harmony”.
Image | Hu Weiwu attending the donation ceremony of Loongson Technology (Source: University of Science and Technology of China)
Finally, Hu Weiwu concluded that binary translation can solve compatibility issues, but it must be recognized that it is strategically a “transitional solution”; it is more of a pathway for new architectures, and if the new architecture fails, it will also disappear; if the new architecture succeeds, it will also disappear.
A Zhihu user, maomaobear, expressed concerns about the efficiency of translated programs: “Microsoft’s X86 to ARM and Intel’s ARM to X86 have very low efficiency, while Apple’s implementation seems a bit better.”
Loongson insiders responded: “Loongson has been developing instruction sets for nearly 20 years, and the ability to launch a fully autonomous instruction set architecture is a result of accumulated experience, not just a spur-of-the-moment decision or a paper.”
The Fate of Latecomers
In fact, we need not feel indignant about being “bottlenecked”.
In the field of electronic computing, the vast majority of countries, including our own, are “latecomers”. Looking at its development history, it can almost be considered a history of the domestic industry in the United States.
The first true electronic computer was invented by Americans in 1937; the “father of modern computing”, John von Neumann, was American; integrated circuits were developed by Americans; the first microprocessor was launched by Intel; the internet was established by Americans; the first desktop computer, operating system, mouse, keyboard, and hard disk were all pioneered by Americans…
In this process, a large number of historically significant names emerged in the United States. Countless scholars, businessmen, officials, and engineers made the U.S. a pioneer. While holding an absolute advantage, they also set many obstacles for latecomers.
Some of these obstacles we have already overcome, such as lithium battery separators, the 5G communication field, and the Beidou global positioning system; some are currently being crossed, such as the CPU instruction system discussed in this article.
However, we need not be impatient or panic. We are not lagging behind overnight, nor can we catch up overnight.
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