Introduction
Chipsea Technology has launched the next-generation versatile multi-fast charging protocol Buck-Boost SoC CPW6430, which is an integrated “three-in-one” chip that includes a full protocol stack such as PD3.2 and UFCS, a synchronous bidirectional buck-boost controller, and a high-performance MCU. This chip aims to address three core pain points in the current fast charging market: high power demand, protocol fragmentation, and low development efficiency, providing a complete solution from protocol certification to system design for USB Type-C PD fast charging devices.
Recently, ChargerLAB obtained a mobile power bank DEMO based on Chipsea Technology’s CPW6430, which supports up to 140W PD3.1 fast charging through its USB interface, while also being compatible with mainstream fast charging protocols such as UFCS, SCP, QC, and PPS, supporting multi-port, strong compatibility, and high-performance product design. Let’s take a detailed look below.
Appearance of the Chipsea Technology CPW6430 Mobile Power Bank Reference Design
The Chipsea Technology CPW6430 mobile power bank reference design uses an XT60 interface for power supply, with IO pins designed on one side of the board for testing, and multiple test points for customer convenience. The components such as chips, capacitors, and inductors on the DEMO are concentrated on the front, equipped with four USB interface sockets (3C1A), although the USB-C3 port is not functionally designed.
The front of the PCB board features the Chipsea Technology CPW6430 SoC chip, buck-boost switching transistors, inductors, filter capacitors, and VBUS switching transistors.
The back of the board only has surface-mounted resistors, capacitors, and other small components.
The measured length of the PCBA module is 102.74mm.
The width is 90.5mm.
The thickness is 12.32mm.
Additionally, the measured weight of the PCBA module is approximately 74g.
Using the ChargerLAB POWER-Z KT003C, it was measured that the USB-C1 port supports UFCS, QC3.0/5, FCP, AFC, PD3.1, PPS, DCP, and Apple 2.4A charging protocols.
The PDO message shows that the USB-C1 port also has six fixed voltage levels of 5V3A, 9V3A, 12V3A, 15V3A, 20V5A, and 28V5A, as well as two PPS voltage levels of 3.3-11V5A and 3.3-20V5A, and a 15-28V 140W AVS voltage level.
It was measured that the UFCS integrated fast charging has three voltage levels of 5-5.5V3A, 5.5-11V3A, and 11-20V3A.
It was measured that the USB-C2 port supports UFCS, QC3.0/5, FCP, SCP, AFC, PD3.1, PPS, DCP, and Apple 2.4A charging protocols.
Additionally, the PDO message results are the same as those of the USB-C1 port.
Moreover, the UFCS integrated fast charging message is also the same.
Finally, it was measured that the USB-A port supports UFCS, QC3.0, DCP, and Apple 2.4A charging protocols.
The UFCS integrated fast charging has two voltage levels of 5-5.5V3A and 5.5-11V3A.
Analysis of the Chipsea Technology CPW6430 Mobile Power Bank Reference Design
Close-up of the XT60 interface used for power input.
The filter solid-state capacitor specification is 50V330μF.
The core component of the DEMO is the Chipsea Technology next-generation versatile multi-protocol fast charging power management SoC CPW6430, which supports 2-8 series lithium battery management, with OTG output up to 36V, suitable for high-power devices such as laptops and power tools. It features a built-in synchronous bidirectional buck-boost architecture, achieving over 96% conversion efficiency, reducing heat generation by 30% compared to traditional solutions, and breaking through the EPR-140W power ceiling.
CPW6430 supports fast charging protocols such as PD3.2, UFCS, AFC, and SCP, meeting the dual certification requirements of PD3.1 EPR-140W and UFCS. It supports dual PD modules and three FCMP modules for multi-port intelligent management, allowing for a dual Type-C and USB-A three-interface design with dynamic power allocation. Additionally, safety and reliability have been upgraded, with CC/DPDM pin voltage resistance increased to 31V and surge resistance reaching ±20V (8/20μs), meeting the stringent environmental requirements of EPR.
CPW6430 integrates an adjustable operational amplifier (1-32 times amplification) and an 11-bit high-precision DAC, supporting 5mΩ low resistance sampling. Current detection accuracy is ±100mA, and voltage regulation accuracy is ±10mV, meeting the stringent requirements of PPS/UFCS protocols. The low resistance design reduces loop impedance, improving system efficiency by 2% and reducing temperature rise by 5°C.
CPW6430 is equipped with a high-performance 32-bit MCU, with 128KB Flash and 24KB SRAM, capable of running PD3.1 certification programs and complex protocol stacks in parallel. It integrates SPI, I2C, UART, and USB2.0 interfaces, supporting external peripherals such as display screens and wireless modules, meeting the interactive needs of energy storage power supplies and smart charging piles.
The synchronous buck-boost switching transistors use Changjing Technology CJAC2R5SN04C, NMOS transistors, rated for 40V, with a conduction resistance of 2mΩ, packaged in PDFNWB5*6-8L.
Additionally, close-up of two Changjing Technology CJAC2R5SN04C buck-boost switching transistors.
Close-up of the magnetic ring buck-boost inductor.
All three filter solid-state capacitors are rated at 50V330μF.
Close-up of a 3.3μH buck-boost inductor.
The VBUS switching transistor for the USB-C1 interface is marked 140P03.
The VBUS switching transistor for the USB-C2 port has the same part number.
The VBUS switching transistor for the USB-A port has the same part number.
ChargerLAB Summary
The 140W mobile power bank DEMO designed by Chipsea Technology based on the CPW6430 chip supports management of 8 series batteries and 36V output, with multiple USB fast charging function interfaces, and can achieve intelligent power distribution across multiple ports. Additionally, it is compatible with all protocols such as PD3.1, UFCS, and QC, meeting the fast charging needs of laptops, power tools, and more.
CPW6430 breaks through the bottleneck of the fast charging market with its “three-in-one” high-integration design, achieving over 96% efficiency with a synchronous buck-boost architecture, while providing precise current detection of ±100mA, balancing high power with low heat generation. The high-performance MCU and rich interfaces further expand the design upgrade potential for mobile energy storage products, providing a one-stop solution for fast charging devices.
Related Reading:
1、Analysis of the Fast Charging Mobile Power Bank Reference Design by Chipsea Technology CSU3AF10
2、Analysis of the Mobile Power Bank Reference Design by Chipsea Technology CPW6410
3、Comprehensive Analysis of the Advantages of the Versatile PD Fast Charging Controller Chip by Chipsea Technology CSU3AF10
4、Born for Connectivity, Chipsea Technology Launches USB3.0 Hub Chip CUB3141
5、Chipsea Technology’s USB-PD Fast Charging Overall Solution Provides Comprehensive Solutions for Type-C PD Applications
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