In semiconductor factories, there is a “counterintuitive” truth: a 0.1μm particle (600 times thinner than a human hair) can cause an entire batch of chips to be scrapped, and 10ppm of alkali metal ions can shift the threshold voltage of MOS transistors by 0.1V, leading to direct “failure”. Even more astonishing is that personnel are the largest source of contamination in cleanrooms—if they do not wear cleanroom suits properly, skin oils and hair can ruin wafers worth thousands of dollars. Today, we will break down the “full-process protection” of semiconductor contamination control: from 5 types of deadly contaminants to 7 major source controls, and finally to the RCA cleaning “gold standard”, to see how chips transform from “contaminated” to “ultra-clean”.
First, let’s break it down: 5 types of contamination are the “deadly killers” of chips, and their sources are all around us.
The sensitivity of semiconductors to contamination is far beyond imagination—3nm process circuits cannot tolerate particles larger than 0.05μm, and they cannot withstand heavy metal residues of 0.02ppb. The main contaminants fall into 5 categories, each with “precise destructive methods”:
1. Particles: The most “common” assassins, 0.1μm is a “giant obstacle”.
- Source: Airborne dust, debris from equipment wear, photoresist residues, and even operator hair;
- Adhesion secret: They adhere to the wafer surface through van der Waals forces, making them as hard to remove as “magnet attracting iron filings”;
- Harm: Block the photolithography light, causing circuit shorts and pinholes in the oxide layer, leading to a direct drop in yield;
- Safety red line: The acceptable particle size must be less than half of the minimum device feature size (for example, in a 7nm process, particles must be <3.5nm).
2. Metal contamination: The culprit of “messy wiring”, with humans being the largest source.
- Source: Impurities from chemical reagents, ion implantation equipment, pipe wear, and even Na+ and K+ from operator gloves;
- Common “culprits” and harms:
- Alkali metals (Na, K): Penetrate the gate oxide layer of MOS transistors, shifting the threshold voltage by 0.1V, causing the chip to “switch uncontrollably”;
- Heavy metals (Fe, Cu, Au): Cu ions can quickly deposit on the silicon surface under light, causing PN junction leakage, reducing DRAM refresh time from 100ms to several ms;
- Reasons for difficulty in removal: Precious metals like Au can exchange charges with hydrogen atoms on the silicon surface, sticking like “glue”, and cannot be washed away with ordinary water.
3. Organic contamination: An obstacle like “plastic wrap”, must be removed first to clean properly.
- Source: Residues from photoresist, mechanical lubricants, and organic vapors in cleanrooms;
- Harm: Forms a transparent film on the wafer surface, preventing subsequent cleaning solutions from penetrating, effectively giving metals and particles a “protective coat”;
- Processing priority: Must be removed first! Commonly used sulfuric acid + hydrogen peroxide (Piranha solution) carbonizes organic matter, then oxidizes it to CO₂ and blows it away.
4. Natural oxide layer: The trouble of “automatic rusting”, forms in just 1 second.
- Formation speed: When silicon wafers are exposed to air/water for 1 second, a 2-3nm oxide layer forms on the surface, and hydrogen peroxide during cleaning can also promote the formation of a chemical oxide layer;
- Harm: Increases contact resistance (for example, the contact resistance between tungsten plugs and silicon can double), and can trap metal impurities, allowing impurities to penetrate into silicon at high temperatures, forming leakage paths;
- Removal method: Soak in diluted hydrofluoric acid (HF:H₂O=1:50), which can remove the oxide layer and make the silicon surface hydrophobic (preventing water marks).
5. ESD (Electrostatic Discharge): “Invisible electric shocks” that can evaporate metal wires.
- Generation scenario: Low humidity in cleanrooms (40%±10% RH), friction between silicon wafers and equipment can generate tens of thousands of volts of static electricity;
- Harm: The discharge current exceeds 1A at the moment of discharge, which can directly evaporate metal wires and break down oxide layers; it can also charge the wafer, attracting more particles;
- Control key: Grounding equipment, wearing anti-static cleanroom suits, and using air ionizers to neutralize charges.
Second, source control: 7 major sources of contamination, managing everything from air to equipment.
The core of contamination control is “preventing problems before they occur”; the 7 major sources must be strictly controlled, like creating a “sterile protective shield” for chips:
1. Air: In a Class 1 cleanroom, only 1 particle of 0.1μm is allowed per cubic foot.
- Purification level standard: Classified by “number of particles >0.1μm per cubic foot of air”; core process areas must reach “Class 1” (≤1 particle), which is 1 million times cleaner than regular air;
- Airflow control: Use HEPA/ULPA filters (99.9995% efficiency), with air flowing vertically from the ceiling down like a “waterfall” to push particles to the ground, avoiding turbulence;
- Circulation efficiency: Air is cycled every 6 seconds to ensure timely removal of pollutants.
2. People: The largest source of contamination, cleanroom suits must provide “full coverage”.
- Protective equipment: Wear tightly woven polyester cleanroom suits that cover hair, skin, and shoes, achieving a 99.999% barrier against 0.1μm particles;
- Operational specifications: Blow off particles for 10 seconds in the air shower before entering, move slowly in the cleanroom (to avoid disturbing airflow), and only bring necessary items;
- Key data: A person not wearing a cleanroom suit properly can release 1 million particles per hour, while wearing it correctly can reduce this to below 100.
3. Water: DI water resistivity must reach 18MΩ, 1 million times purer than mineral water.
- Treatment process: Tap water → reverse osmosis → ion exchange → UV sterilization → ultrafiltration, ultimately producing “deionized water (DI water)”;
- Core indicators: Resistivity of 18MΩ at 25°C (completely free of ions), no bacteria or silica, otherwise it will continuously contaminate wafers;
- Staggering usage: A semiconductor fab uses hundreds of thousands of liters of DI water daily, equivalent to the volume of 500 swimming pools.
4. Equipment: The largest source of particles, transmission must be “closed”.
- Design points: Use robotic arms to transfer wafers, avoiding human contact; add microenvironments (Class 1 cleanliness) inside equipment to reduce particle fallout;
- Regular maintenance: Clean the inside of equipment every two weeks and replace worn parts to avoid debris contamination.
In addition, process chemicals (filtering particles larger than 0.2μm), process gases (purity of 99.9999%), and factory layout (positive pressure in core areas to prevent external contamination) must also be strictly controlled. Any failure in one link can render the previous protections “ineffective”.
Third, the core defense: The “gold standard” for wafer cleaning—RCA process.
If source control fails to stop contamination, wafer cleaning is the “remedy”. Currently, the most mainstream method in the industry isRCA wet cleaning—invented in 1970, it remains the “cleanliness standard”, centered around the chemical combination of “SC-1 + SC-2”, akin to giving wafers a “multi-step spa”.
The “chemical team” of RCA cleaning: 2 types of solutions + 9-step process, covering all contaminants.
|
Step |
Reagents (volume ratio) |
Temperature |
Function (analogy) |
Target contaminants |
|
1 |
H₂SO₄:H₂O₂=4:1 |
120℃ |
Remove organic matter “strong degreaser”: carbonizes photoresist, oils |
Organic matter, some metals |
|
2 |
Ultra-pure water (DI water) |
Room temperature |
Rinse off sulfuric acid residues |
Reagent residues |
|
3 |
NH₄OH:H₂O₂:H₂O=1:1:5 |
80℃ |
Remove particles “scrubbing towel”: lightly etches the silicon surface, allowing particles to detach |
Particles >0.1μm, mild organic matter |
|
4 |
DI water |
Room temperature |
Rinse off SC-1 residues |
Reagent residues |
|
5 |
HCl:H₂O₂:H₂O=1:1:6 |
80℃ |
Remove metals “rust remover”: forms soluble complexes with metal ions |
Copper, iron, sodium, and other metal ions |
|
6 |
DI water |
Room temperature |
Rinse off SC-2 residues |
Reagent residues |
|
7 |
HF:H₂O=1:50 |
Room temperature |
Remove oxide layer “peeling agent”: dissolves natural/chemical oxide layers |
Natural oxide layer, chemical oxide layer |
|
8 |
DI water |
Room temperature |
Rinse off HF residues |
Reagent residues |
|
9 |
Nitrogen drying |
Room temperature |
Avoid water marks |
Moisture |
Key details
- SC-1 is an alkaline solution that will slightly etch the silicon surface; the NH₄OH ratio must be controlled (to avoid excessive roughness);
- DI water must be used to rinse after each step; otherwise, reagent residues will corrode the wafers;
- Containers must be made of quartz or Teflon (ordinary glass will be corroded by HF).
Cleaning equipment: Ultrasonic, spray, scrubbing, each has its “special powers”.
- Ultrasonic cleaning: Uses 1MHz ultrasonic energy to shake off fine particles, gentler than ultrasonic waves, and will not scratch the silicon wafer;
- Spray cleaning: Wafers spin at high speed (3000r/min), fresh reagents are sprayed, using centrifugal force to fling away dirty water, suitable for large diameter wafers;
- Scrubbing tool: Soft brushes combined with DI water to remove large particles (below 2μm) left after CMP, avoiding scratches.
Fourth, advanced solutions: Alternative technologies to RCA, more environmentally friendly and precise.
Traditional RCA uses large amounts of strong acids and bases, which are expensive and dangerous; the industry is developing 3 types of alternative solutions:
1. Dry cleaning: No chemicals, relies on plasma to “gasify contaminants”.
- Plasma cleaning: Introduces oxygen into a vacuum chamber, applying high-frequency voltage to turn oxygen into “plasma”, oxidizing organic matter into CO₂ and removing it, suitable for “water-sensitive” metal structures;
- Advantages: No waste liquid, can clean locally; disadvantages: cannot completely remove metals, often used in conjunction with wet methods.
2. Chelating agents (EDTA): “Handcuffing” metal ions.
- Principle: EDTA can form stable complexes with metal ions (like handcuffs), preventing metals from redepositing on the wafer surface;
- Advantages: Can reduce metal residues by 90%, suitable for advanced processes (45nm and below).
3. Supercritical cleaning: Using CO₂ for “penetrating cleaning”.
- Principle: Under high pressure, CO₂ becomes a “supercritical fluid” (between liquid and gas), able to penetrate deep grooves and strip fine particles without damaging low-k materials;
- Advantages: No surface tension, non-corrosive, suitable for complex structures like 3D chips.
Fifth, conclusion: Contamination control is a “three-line defense”, and missing any line is unacceptable.
The core of semiconductor contamination control is the “prevention + cleaning + absorption” three-line defense:
- Cleanroom: Control air, people, and equipment to reduce contamination from the source;
- Wafer cleaning: Use RCA or alternative technologies to remove residual contamination;
- Absorption: Push leaked metal ions to the back of the wafer (without affecting the front devices).
As chip processes advance towards 2nm and 1nm, the standards for contamination control will become even stricter—particles must be <0.01μm, and metal residues must be <0.01ppb. But one thing is certain: whoever masters “full-process contamination control” will gain a “yield advantage” in the semiconductor race—after all, even the most advanced chip designs must first be “cleaned” to be realized.